50 lines
1.7 KiB
Diff
50 lines
1.7 KiB
Diff
From 8817bcbbaf64d54bd4d06659cc77d1bfc9e53dad Mon Sep 17 00:00:00 2001
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From: Gabor Juhos <juhosg@openwrt.org>
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Date: Fri, 15 Feb 2013 13:38:19 +0000
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Subject: [PATCH] MIPS: ath79: add GPIO setup code for the QCA955X SoCs
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commit f818ca3e6894d4a630a1ecc673c91df8fb6f6898 upstream.
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The existing code can handle the GPIO controller of
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the QCA955x SoCs. Add a minimal glue code to make it
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working.
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Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com>
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Cc: Giori, Kathy <kgiori@qca.qualcomm.com>
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Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com>
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Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
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Patchwork: http://patchwork.linux-mips.org/patch/4947/
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Signed-off-by: John Crispin <blogic@openwrt.org>
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---
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arch/mips/ath79/gpio.c | 4 +++-
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arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 1 +
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2 files changed, 4 insertions(+), 1 deletion(-)
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--- a/arch/mips/ath79/gpio.c
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+++ b/arch/mips/ath79/gpio.c
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@@ -194,12 +194,14 @@ void __init ath79_gpio_init(void)
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ath79_gpio_count = AR933X_GPIO_COUNT;
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else if (soc_is_ar934x())
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ath79_gpio_count = AR934X_GPIO_COUNT;
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+ else if (soc_is_qca955x())
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+ ath79_gpio_count = QCA955X_GPIO_COUNT;
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else
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BUG();
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ath79_gpio_base = ioremap_nocache(AR71XX_GPIO_BASE, AR71XX_GPIO_SIZE);
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ath79_gpio_chip.ngpio = ath79_gpio_count;
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- if (soc_is_ar934x()) {
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+ if (soc_is_ar934x() || soc_is_qca955x()) {
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ath79_gpio_chip.direction_input = ar934x_gpio_direction_input;
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ath79_gpio_chip.direction_output = ar934x_gpio_direction_output;
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}
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--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
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+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
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@@ -510,6 +510,7 @@
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#define AR913X_GPIO_COUNT 22
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#define AR933X_GPIO_COUNT 30
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#define AR934X_GPIO_COUNT 23
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+#define QCA955X_GPIO_COUNT 24
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/*
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* SRIF block
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