bf4f1feb7a
BCM6318 has a special initialization sequence which involves touching PLL control registers in the USBH_PRIV register space, as well as toggling a bit the Simulation control register. Signed-off-by: Florian Fainelli <florian@openwrt.org> SVN-Revision: 39302
22 lines
829 B
Diff
22 lines
829 B
Diff
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
|
|
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
|
|
@@ -912,6 +912,8 @@ void __init board_prom_init(void)
|
|
if (BCMCPU_IS_6348())
|
|
val |= GPIO_MODE_6348_G3_EXT_MII |
|
|
GPIO_MODE_6348_G0_EXT_MII;
|
|
+ else if (BCMCPU_IS_6358())
|
|
+ val |= GPIO_MODE_6358_ENET1_MII_CLK_INV;
|
|
}
|
|
|
|
bcm_gpio_writel(val, GPIO_MODE_REG);
|
|
--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
|
|
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
|
|
@@ -767,6 +767,8 @@
|
|
#define GPIO_MODE_6358_EXTRA_SPI_SS (1 << 7)
|
|
#define GPIO_MODE_6358_SERIAL_LED (1 << 10)
|
|
#define GPIO_MODE_6358_UTOPIA (1 << 12)
|
|
+#define GPIO_MODE_6358_ENET1_MII_CLK_INV (1 << 30)
|
|
+#define GPIO_MODE_6358_ENET0_MII_CLK_INV (1 << 31)
|
|
|
|
#define GPIO_MODE_6368_ANALOG_AFE_0 (1 << 0)
|
|
#define GPIO_MODE_6368_ANALOG_AFE_1 (1 << 1)
|