openwrtv4/target/linux/mpc85xx/files/arch/powerpc/boot/dts/tl-wdr4900-v1.dts
Imre Kaloz b9fbf31fe7 mpc85xx: move newly created files from patch files to files directory
This will make these files much more maintainable.

Signed-off-by: Matthias Schiffer <mschiffer@universe-factory.net>

SVN-Revision: 45597
2015-05-03 17:58:45 +00:00

212 lines
3.8 KiB
Text

/*
* TP-Link TL-WDR4900 v1 Device Tree Source
*
* Copyright 2013 Gabor Juhos <juhosg@openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
/include/ "fsl/p1010si-pre.dtsi"
/ {
model = "TP-Link TL-WDR4900 v1";
compatible = "tp-link,TL-WDR4900v1";
chosen {
bootargs = "console=ttyS0,115200";
/*
linux,stdout-path = "/soc@ffe00000/serial@4500";
*/
};
aliases {
spi0 = &spi0;
};
memory {
device_type = "memory";
};
soc: soc@ffe00000 {
ranges = <0x0 0x0 0xffe00000 0x100000>;
spi0: spi@7000 {
flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spansion,s25fl129p1";
reg = <0>;
spi-max-frequency = <25000000>;
u-boot@0 {
reg = <0x0 0x0050000>;
label = "u-boot";
read-only;
};
dtb@50000 {
reg = <0x00050000 0x00010000>;
label = "dtb";
read-only;
};
kernel@60000 {
reg = <0x00060000 0x002a0000>;
label = "kernel";
};
rootfs@300000 {
reg = <0x00300000 0x00ce0000>;
label = "rootfs";
};
config@fe0000 {
reg = <0x00fe0000 0x00010000>;
label = "config";
read-only;
};
caldata@ff0000 {
reg = <0x00ff0000 0x00010000>;
label = "caldata";
read-only;
};
firmware@60000 {
reg = <0x00060000 0x00f80000>;
label = "firmware";
};
};
};
gpio0: gpio-controller@f000 {
};
usb@22000 {
phy_type = "utmi";
dr_mode = "host";
};
mdio@24000 {
phy0: ethernet-phy@0 {
reg = <0x0>;
qca,ar8327-initvals = <
0x00004 0x07600000 /* PAD0_MODE */
0x00008 0x00000000 /* PAD5_MODE */
0x0000c 0x01000000 /* PAD6_MODE */
0x00010 0x40000000 /* POWER_ON_STRIP */
0x00050 0xcf35cf35 /* LED_CTRL0 */
0x00054 0xcf35cf35 /* LED_CTRL1 */
0x00058 0xcf35cf35 /* LED_CTRL2 */
0x0005c 0x03ffff00 /* LED_CTRL3 */
0x0007c 0x0000007e /* PORT0_STATUS */
>;
};
};
mdio@25000 {
status = "disabled";
};
mdio@26000 {
status = "disabled";
};
enet0: ethernet@b0000 {
phy-handle = <&phy0>;
phy-connection-type = "rgmii-id";
};
enet1: ethernet@b1000 {
status = "disabled";
};
enet2: ethernet@b2000 {
status = "disabled";
};
sdhc@2e000 {
status = "disabled";
};
serial1: serial@4600 {
status = "disabled";
};
can0: can@1c000 {
status = "disabled";
};
can1: can@1d000 {
status = "disabled";
};
};
pci0: pcie@ffe09000 {
reg = <0 0xffe09000 0 0x1000>;
ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
pcie@0 {
ranges = <0x2000000 0x0 0xa0000000
0x2000000 0x0 0xa0000000
0x0 0x20000000
0x1000000 0x0 0x0
0x1000000 0x0 0x0
0x0 0x100000>;
};
};
pci1: pcie@ffe0a000 {
reg = <0 0xffe0a000 0 0x1000>;
ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
pcie@0 {
ranges = <0x2000000 0x0 0x80000000
0x2000000 0x0 0x80000000
0x0 0x20000000
0x1000000 0x0 0x0
0x1000000 0x0 0x0
0x0 0x100000>;
};
};
ifc: ifc@ffe1e000 {
status = "disabled";
};
leds {
compatible = "gpio-leds";
system {
gpios = <&gpio0 2 1>; /* active low */
label = "tp-link:blue:system";
};
usb1 {
gpios = <&gpio0 3 1>; /* active low */
label = "tp-link:green:usb1";
};
usb2 {
gpios = <&gpio0 4 1>; /* active low */
label = "tp-link:green:usb2";
};
};
buttons {
compatible = "gpio-keys";
reset {
label = "Reset button";
gpios = <&gpio0 5 1>; /* active low */
linux,code = <0x198>; /* KEY_RESTART */
};
};
};
/include/ "fsl/p1010si-post.dtsi"