021c893658
size-cells should be 0 in order to avoid dummy values in reg properties. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
98 lines
1.4 KiB
Text
98 lines
1.4 KiB
Text
/dts-v1/;
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#include "mt7620a.dtsi"
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/ {
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compatible = "ralink,mt7620a-soc";
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model = "Planex DB-WRT01";
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gpio-leds {
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compatible = "gpio-leds";
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power {
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label = "db-wrt01:orange:power";
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gpios = <&gpio1 1 1>;
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};
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};
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gpio-keys-polled {
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compatible = "gpio-keys-polled";
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#address-cells = <1>;
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#size-cells = <0>;
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poll-interval = <20>;
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s1 {
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label = "wps";
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gpios = <&gpio0 2 1>;
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linux,code = <0x211>;
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};
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};
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};
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&gpio1 {
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status = "okay";
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};
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&spi0 {
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status = "okay";
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m25p80@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "jedec,spi-nor";
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reg = <0>;
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linux,modalias = "m25p80", "mx25l6405d";
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spi-max-frequency = <10000000>;
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partition@0 {
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label = "u-boot";
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reg = <0x0 0x30000>;
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read-only;
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};
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partition@30000 {
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label = "u-boot-env";
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reg = <0x30000 0x10000>;
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read-only;
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};
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factory: partition@40000 {
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label = "factory";
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reg = <0x40000 0x10000>;
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read-only;
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};
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partition@50000 {
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label = "firmware";
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reg = <0x50000 0x7b0000>;
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};
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};
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};
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&pinctrl {
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state_default: pinctrl0 {
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gpio {
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ralink,group = "i2c", "spi refclk", "rgmii1";
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ralink,function = "gpio";
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};
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};
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};
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ðernet {
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pinctrl-names = "default";
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pinctrl-0 = <&ephy_pins>;
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mtd-mac-address = <&factory 0x4>;
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mediatek,portmap = "llllw";
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};
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&gsw {
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mediatek,port4 = "ephy";
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};
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&wmac {
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ralink,mtd-eeprom = <&factory 0>;
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};
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&pcie {
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status = "okay";
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};
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