when sleep mode is disable use MIPS as clocksource and clockevent instead of systick.
because MIPS timer has higher resolution 5ns less than systick 20us and
larger counter bits 32 > 16.
clean interrupt by write compare register at isr.
fix typo cause sleep mode not enable.
Signed-off-by: Michael Lee <igvtee@gmail.com>
SVN-Revision: 47122