8d1580c4bb
SVN-Revision: 45570
35 lines
1.3 KiB
Diff
35 lines
1.3 KiB
Diff
From 5c81397a0147ea59c778d1de14ef54e2268221f6 Mon Sep 17 00:00:00 2001
|
|
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com>
|
|
Date: Wed, 8 Apr 2015 06:58:11 +0200
|
|
Subject: [PATCH] ssb: reject PCI writes setting CardBus bridge resources
|
|
MIME-Version: 1.0
|
|
Content-Type: text/plain; charset=UTF-8
|
|
Content-Transfer-Encoding: 8bit
|
|
|
|
If SoC has a CardBus we can set resources of device at slot 1 only. It's
|
|
impossigle to set bridge resources as it simply overwrites device 1
|
|
configuration and usually results in Data bus error-s.
|
|
|
|
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
|
|
---
|
|
drivers/ssb/driver_pcicore.c | 4 ++++
|
|
1 file changed, 4 insertions(+)
|
|
|
|
diff --git a/drivers/ssb/driver_pcicore.c b/drivers/ssb/driver_pcicore.c
|
|
index 15a7ee3..c603d19 100644
|
|
--- a/drivers/ssb/driver_pcicore.c
|
|
+++ b/drivers/ssb/driver_pcicore.c
|
|
@@ -164,6 +164,10 @@ static int ssb_extpci_write_config(struct ssb_pcicore *pc,
|
|
SSB_WARN_ON(!pc->hostmode);
|
|
if (unlikely(len != 1 && len != 2 && len != 4))
|
|
goto out;
|
|
+ /* CardBus SoCs allow configuring dev 1 resources only */
|
|
+ if (extpci_core->cardbusmode && dev != 1 &&
|
|
+ off >= PCI_BASE_ADDRESS_0 && off <= PCI_BASE_ADDRESS_5)
|
|
+ goto out;
|
|
addr = get_cfgspace_addr(pc, bus, dev, func, off);
|
|
if (unlikely(!addr))
|
|
goto out;
|
|
--
|
|
1.8.4.5
|
|
|