96 lines
2.1 KiB
Diff
96 lines
2.1 KiB
Diff
--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
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+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
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@@ -26,6 +26,11 @@
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next-level-cache = <&L2>;
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qcom,acc = <&acc0>;
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qcom,saw = <&saw0>;
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+ clocks = <&kraitcc 0>, <&kraitcc 4>;
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+ clock-names = "cpu", "l2";
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+ clock-latency = <100000>;
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+ cpu-supply = <&smb208_s2a>;
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+ voltage-tolerance = <5>;
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};
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cpu@1 {
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@@ -36,12 +41,20 @@
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next-level-cache = <&L2>;
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qcom,acc = <&acc1>;
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qcom,saw = <&saw1>;
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+ clocks = <&kraitcc 1>, <&kraitcc 4>;
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+ clock-names = "cpu", "l2";
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+ clock-latency = <100000>;
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+ cpu-supply = <&smb208_s2b>;
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};
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L2: l2-cache {
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compatible = "cache";
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cache-level = <2>;
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};
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+
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+ qcom,l2 {
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+ qcom,l2-rates = <384000000 1000000000 1200000000>;
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+ };
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};
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cpu-pmu {
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@@ -73,6 +86,46 @@
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};
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};
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+ kraitcc: clock-controller {
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+ compatible = "qcom,krait-cc-v1";
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+ #clock-cells = <1>;
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+ };
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+
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+ qcom,pvs {
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+ qcom,pvs-format-a;
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+ qcom,speed0-pvs0-bin-v0 =
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+ < 1400000000 1250000 >,
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+ < 1200000000 1200000 >,
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+ < 1000000000 1150000 >,
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+ < 800000000 1100000 >,
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+ < 600000000 1050000 >,
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+ < 384000000 1000000 >;
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+
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+ qcom,speed0-pvs1-bin-v0 =
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+ < 1400000000 1175000 >,
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+ < 1200000000 1125000 >,
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+ < 1000000000 1075000 >,
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+ < 800000000 1025000 >,
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+ < 600000000 975000 >,
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+ < 384000000 925000 >;
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+
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+ qcom,speed0-pvs2-bin-v0 =
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+ < 1400000000 1125000 >,
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+ < 1200000000 1075000 >,
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+ < 1000000000 1025000 >,
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+ < 800000000 995000 >,
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+ < 600000000 925000 >,
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+ < 384000000 875000 >;
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+
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+ qcom,speed0-pvs3-bin-v0 =
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+ < 1400000000 1050000 >,
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+ < 1200000000 1000000 >,
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+ < 1000000000 950000 >,
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+ < 800000000 900000 >,
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+ < 600000000 850000 >,
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+ < 384000000 800000 >;
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+ };
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+
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soc: soc {
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#address-cells = <1>;
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#size-cells = <1>;
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@@ -215,11 +268,13 @@
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acc0: clock-controller@2088000 {
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compatible = "qcom,kpss-acc-v1";
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reg = <0x02088000 0x1000>, <0x02008000 0x1000>;
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+ clock-output-names = "acpu0_aux";
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};
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acc1: clock-controller@2098000 {
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compatible = "qcom,kpss-acc-v1";
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reg = <0x02098000 0x1000>, <0x02008000 0x1000>;
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+ clock-output-names = "acpu1_aux";
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};
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l2cc: clock-controller@2011000 {
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