49c3b1c455
Align with upstream version, mostly non-fixes and small clean ups. Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
29 lines
1.1 KiB
Diff
29 lines
1.1 KiB
Diff
From 23d94cb855b6f4f0ee1c01679224472104ac6440 Mon Sep 17 00:00:00 2001
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From: Jonas Gorski <jonas.gorski@gmail.com>
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Date: Sat, 30 Sep 2017 14:10:18 +0200
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Subject: [PATCH 2/6] bcm63xx_enet: do not write to random DMA channel on
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BCM6345
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The DMA controller regs actually point to DMA channel 0, so the write to
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ENETDMA_CFG_REG will actually modify a random DMA channel.
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Since DMA controller registers do not exist on BCM6345, guard the write
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with the usual check for dma_has_sram.
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Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
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---
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drivers/net/ethernet/broadcom/bcm63xx_enet.c | 3 ++-
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1 file changed, 2 insertions(+), 1 deletion(-)
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--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
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+++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
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@@ -1063,7 +1063,8 @@ static int bcm_enet_open(struct net_devi
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val = enet_readl(priv, ENET_CTL_REG);
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val |= ENET_CTL_ENABLE_MASK;
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enet_writel(priv, val, ENET_CTL_REG);
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- enet_dma_writel(priv, ENETDMA_CFG_EN_MASK, ENETDMA_CFG_REG);
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+ if (priv->dma_has_sram)
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+ enet_dma_writel(priv, ENETDMA_CFG_EN_MASK, ENETDMA_CFG_REG);
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enet_dmac_writel(priv, priv->dma_chan_en_mask,
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ENETDMAC_CHANCFG, priv->rx_chan);
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