0d9f760f27
Includes memory allocation fixes as well as several networking fixes. Signed-off-by: Jonas Gorski <jogo@openwrt.org> SVN-Revision: 37103
49 lines
1.5 KiB
Diff
49 lines
1.5 KiB
Diff
From f4c0850f31389bbb6b8d806be7786efc62af1e84 Mon Sep 17 00:00:00 2001
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From: John Crispin <blogic@openwrt.org>
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Date: Fri, 12 Apr 2013 12:45:27 +0200
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Subject: [PATCH 110/164] MIPS: ralink: add uart mask to struct ralink_pinmux
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Add a field for the uart muxing mask and set it inside the rt305x setup code.
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Signed-off-by: John Crispin <blogic@openwrt.org>
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Patchwork: http://patchwork.linux-mips.org/patch/5744/
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---
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arch/mips/ralink/common.h | 1 +
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arch/mips/ralink/rt305x.c | 5 +++--
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2 files changed, 4 insertions(+), 2 deletions(-)
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--- a/arch/mips/ralink/common.h
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+++ b/arch/mips/ralink/common.h
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@@ -22,6 +22,7 @@ struct ralink_pinmux {
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struct ralink_pinmux_grp *mode;
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struct ralink_pinmux_grp *uart;
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int uart_shift;
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+ u32 uart_mask;
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void (*wdt_reset)(void);
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struct ralink_pinmux_grp *pci;
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int pci_shift;
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--- a/arch/mips/ralink/rt305x.c
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+++ b/arch/mips/ralink/rt305x.c
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@@ -91,12 +91,12 @@ static struct ralink_pinmux_grp uart_mux
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.name = "gpio uartf",
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.mask = RT305X_GPIO_MODE_GPIO_UARTF,
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.gpio_first = RT305X_GPIO_7,
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- .gpio_last = RT305X_GPIO_14,
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+ .gpio_last = RT305X_GPIO_10,
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}, {
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.name = "gpio i2s",
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.mask = RT305X_GPIO_MODE_GPIO_I2S,
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.gpio_first = RT305X_GPIO_7,
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- .gpio_last = RT305X_GPIO_14,
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+ .gpio_last = RT305X_GPIO_10,
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}, {
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.name = "gpio",
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.mask = RT305X_GPIO_MODE_GPIO,
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@@ -118,6 +118,7 @@ struct ralink_pinmux rt_gpio_pinmux = {
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.mode = mode_mux,
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.uart = uart_mux,
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.uart_shift = RT305X_GPIO_MODE_UART0_SHIFT,
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+ .uart_mask = RT305X_GPIO_MODE_UART0_MASK,
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.wdt_reset = rt305x_wdt_reset,
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};
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