3f4f580954
Bump gcc from 7.1 to 7.2 Compile & run tested: ar71xx Trace history of current patches and update with commit ref & comment to give more clue as to why they're still around/needed. Some have changed form since the original commit but some clue is better than no clue at all. Signed-off-by: Kevin Darbyshire-Bryant <kevin@darbyshire-bryant.me.uk> Tested-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
32 lines
1.2 KiB
Diff
32 lines
1.2 KiB
Diff
commit b050f87d13b5dc7ed82feb9a90f4529de58bdf25
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Author: Felix Fietkau <nbd@openwrt.org>
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Date: Wed Feb 19 19:20:10 2014 +0000
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gcc: prevent the use of LDRD/STRD on ARMv5TE
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These instructions are for 64-bit load/store. On ARMv5TE, the CPU
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requires addresses to be aligned to 64-bit. When misaligned, behavior is
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undefined (effectively either loads the same word twice on LDRD, or
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corrupts surrounding memory on STRD).
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On ARMv6 and newer, unaligned access is safe.
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Removing these instructions for ARMv5TE is necessary, because GCC
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ignores alignment information in pointers and does unsafe optimizations
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that have shown up as bugs in various places.
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Signed-off-by: Felix Fietkau <nbd@openwrt.org>
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SVN-Revision: 39638
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--- a/gcc/config/arm/arm.h
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+++ b/gcc/config/arm/arm.h
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@@ -150,7 +150,7 @@ extern tree arm_fp16_type_node;
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/* Thumb-1 only. */
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#define TARGET_THUMB1_ONLY (TARGET_THUMB1 && !arm_arch_notm)
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-#define TARGET_LDRD (arm_arch5e && ARM_DOUBLEWORD_ALIGN \
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+#define TARGET_LDRD (arm_arch6 && ARM_DOUBLEWORD_ALIGN \
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&& !TARGET_THUMB1)
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#define TARGET_CRC32 (arm_arch_crc)
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