9be491f084
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Imre Kaloz <kaloz@openwrt.org> SVN-Revision: 44266
70 lines
2 KiB
Diff
70 lines
2 KiB
Diff
From 91b4c91f919abffa72cbf7545a944252f8e4f775 Mon Sep 17 00:00:00 2001
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From: Maxime Ripard <maxime.ripard@free-electrons.com>
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Date: Thu, 8 Jan 2015 18:38:08 +0100
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Subject: [PATCH 3/4] ARM: mvebu: Add a number of pinctrl functions
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Some pinctrl functions can be shared with all DTS out there, since they are
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generic, SoC-wide muxing options. Add a number of these to the DTSI to avoid
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duplication.
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Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
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Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
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Signed-off-by: Andrew Lunn <andrew@lunn.ch>
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---
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arch/arm/boot/dts/armada-38x.dtsi | 39 +++++++++++++++++++++++++++++++++++++++
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1 file changed, 39 insertions(+)
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diff --git a/arch/arm/boot/dts/armada-38x.dtsi b/arch/arm/boot/dts/armada-38x.dtsi
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index 40200084c6c8..98885c58be29 100644
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--- a/arch/arm/boot/dts/armada-38x.dtsi
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+++ b/arch/arm/boot/dts/armada-38x.dtsi
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@@ -195,6 +195,45 @@
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pinctrl@18000 {
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reg = <0x18000 0x20>;
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+
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+ ge0_rgmii_pins: ge-rgmii-pins-0 {
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+ marvell,pins = "mpp6", "mpp7", "mpp8",
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+ "mpp9", "mpp10", "mpp11",
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+ "mpp12", "mpp13", "mpp14",
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+ "mpp15", "mpp16", "mpp17";
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+ marvell,function = "ge0";
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+ };
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+
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+ i2c0_pins: i2c-pins-0 {
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+ marvell,pins = "mpp2", "mpp3";
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+ marvell,function = "i2c0";
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+ };
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+
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+ mdio_pins: mdio-pins {
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+ marvell,pins = "mpp4", "mpp5";
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+ marvell,function = "ge";
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+ };
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+
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+ ref_clk0_pins: ref-clk-pins-0 {
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+ marvell,pins = "mpp45";
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+ marvell,function = "ref";
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+ };
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+
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+ spi1_pins: spi-pins-1 {
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+ marvell,pins = "mpp56", "mpp57", "mpp58",
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+ "mpp59";
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+ marvell,function = "spi1";
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+ };
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+
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+ uart0_pins: uart-pins-0 {
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+ marvell,pins = "mpp0", "mpp1";
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+ marvell,function = "ua0";
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+ };
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+
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+ uart1_pins: uart-pins-1 {
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+ marvell,pins = "mpp19", "mpp20";
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+ marvell,function = "ua1";
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+ };
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};
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gpio0: gpio@18100 {
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--
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2.2.1
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