69d323f231
This is a backport of the patches accepted to the Linux mainline related to mvebu SoC (Armada XP and Armada 370) between Linux v3.10, and Linux v3.11. This work mainly covers: * Enabling USB storage, and PCI to mvebu_defconfig. * Add support for NOR flash. * Some PCI device tree related updates, and bus parsing. * Adding Armada XP & 370 PCI driver, and update some clock gating specifics. * Introduce Marvell EBU Device Bus driver. * Enaling USB in the armada*.dts. * Enabling, and updating the mvebu-mbus. * Some SATA and Ethernet related fixes. Signed-off-by: Seif Mazareeb <seif.mazareeb@gmail.com> CC: Luka Perkov <luka@openwrt.org> SVN-Revision: 39564
81 lines
2.8 KiB
Diff
81 lines
2.8 KiB
Diff
From a4dd628f515f361cecfae08e568891442042e4e2 Mon Sep 17 00:00:00 2001
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From: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
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Date: Wed, 5 Jun 2013 09:04:55 +0200
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Subject: [PATCH 025/203] arm: mvebu: avoid hardcoded virtual address in
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coherency code
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Now that the coherency_get_cpu_count() function no longer requires a
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very early mapping of the coherency unit registers, we can avoid the
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hardcoded virtual address in coherency.c. However, the coherency
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features are still used quite early, so we need to do the of_iomap()
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early enough, at the ->init_timer() level, so we have the call of
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coherency_init() at this point.
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Unfortunately, at ->init_timer() time, it is not possible to register
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a bus notifier, so we add a separate coherency_late_init() function
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that gets called as as postcore_initcall(), when bus notifiers are
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available.
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Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
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Acked-by: Arnd Bergmann <arnd@arndb.de>
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Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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---
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arch/arm/mach-mvebu/armada-370-xp.c | 2 +-
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arch/arm/mach-mvebu/coherency.c | 20 ++++++++++----------
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2 files changed, 11 insertions(+), 11 deletions(-)
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--- a/arch/arm/mach-mvebu/armada-370-xp.c
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+++ b/arch/arm/mach-mvebu/armada-370-xp.c
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@@ -47,6 +47,7 @@ static void __init armada_370_xp_timer_a
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{
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mvebu_clocks_init();
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armada_370_xp_timer_init();
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+ coherency_init();
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}
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static void __init armada_370_xp_init_early(void)
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@@ -76,7 +77,6 @@ static void __init armada_370_xp_init_ea
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static void __init armada_370_xp_dt_init(void)
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{
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of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
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- coherency_init();
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}
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static const char * const armada_370_xp_dt_compat[] = {
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--- a/arch/arm/mach-mvebu/coherency.c
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+++ b/arch/arm/mach-mvebu/coherency.c
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@@ -27,14 +27,7 @@
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#include <asm/smp_plat.h>
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#include "armada-370-xp.h"
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-/*
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- * Some functions in this file are called very early during SMP
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- * initialization. At that time the device tree framework is not yet
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- * ready, and it is not possible to get the register address to
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- * ioremap it. That's why the pointer below is given with an initial
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- * value matching its virtual mapping
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- */
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-static void __iomem *coherency_base = ARMADA_370_XP_REGS_VIRT_BASE + 0x20200;
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+static void __iomem *coherency_base;
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static void __iomem *coherency_cpu_base;
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/* Coherency fabric registers */
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@@ -135,9 +128,16 @@ int __init coherency_init(void)
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coherency_base = of_iomap(np, 0);
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coherency_cpu_base = of_iomap(np, 1);
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set_cpu_coherent(cpu_logical_map(smp_processor_id()), 0);
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- bus_register_notifier(&platform_bus_type,
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- &mvebu_hwcc_platform_nb);
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}
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return 0;
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}
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+
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+static int __init coherency_late_init(void)
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+{
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+ bus_register_notifier(&platform_bus_type,
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+ &mvebu_hwcc_platform_nb);
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+ return 0;
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+}
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+
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+postcore_initcall(coherency_late_init);
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