b50fd8c2b3
Register SPI controllers through device tree. We will wire up the clocks at a later stage. Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
50 lines
1.5 KiB
Diff
50 lines
1.5 KiB
Diff
From 0a0c39044332a75eaf4a3c5654079df953b0d839 Mon Sep 17 00:00:00 2001
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From: Jonas Gorski <jogo@openwrt.org>
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Date: Mon, 7 Sep 2015 21:00:38 +0200
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Subject: [PATCH 3/8] spi/bcm63xx: document device tree bindings
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Add documentation for the bindings of the low speed SPI controller found
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on most bcm63xx SoCs.
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Signed-off-by: Jonas Gorski <jogo@openwrt.org>
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---
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.../devicetree/bindings/spi/spi-bcm63xx.txt | 33 ++++++++++++++++++++++
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1 file changed, 33 insertions(+)
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create mode 100644 Documentation/devicetree/bindings/spi/spi-bcm63xx.txt
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--- /dev/null
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+++ b/Documentation/devicetree/bindings/spi/spi-bcm63xx.txt
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@@ -0,0 +1,33 @@
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+Binding for Broadcom BCM6348/BCM6358 SPI controller
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+
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+Required properties:
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+- compatible: must contain one of "brcm,bcm6348-spi", "brcm,bcm6358-spi".
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+- reg: Base address and size of the controllers memory area.
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+- interrupts: Interrupt for the SPI block.
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+- clocks: phandle of the SPI clock.
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+- clock-names: has to be "spi".
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+- #address-cells: <1>, as required by generic SPI binding.
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+- #size-cells: <0>, also as required by generic SPI binding.
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+
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+Optional properties:
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+- num-cs: some controllers have less than 8 cs signals. Defaults to 8
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+ if absent.
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+
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+Child nodes as per the generic SPI binding.
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+
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+Example:
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+
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+ spi@10000800 {
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+ compatible = "brcm,bcm6368-spi", "brcm,bcm6358-spi";
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+ reg = <0x10000800 0x70c>;
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+
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+ interrupts = <1>;
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+
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+ clocks = <&clkctl 9>;
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+ clock-names = "spi";
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+
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+ num-cs = <5>;
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+
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ };
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