ad907e1c03
Add support for NXP layerscape ls1046ardb 64b/32b Dev board. LS1046ARDB Specification: ------------------------- Memory subsystem: * 8GByte DDR4 SDRAM (64bit bus) * 512 Mbyte NAND flash * Two 64 Mbyte high-speed SPI flash * SD connector to interface with the SD memory card * On-board 4G eMMC Ethernet: * Two XFI 10G ports * Two SGMII ports * Two RGMII ports PCIe: * PCIe1 (SerDes2 Lane0) to miniPCIe slot * PCIe2 (SerDes2 Lane1) to x2 PCIe slot * PCIe3 (SerDes2 Lane2) to x4 PCIe slot * USB 3.0: one super speed USB 3.0 type A port, one Micro-AB port * UART: supports two UARTs up to 115200 bps for console Signed-off-by: Yutang Jiang <yutang.jiang@nxp.com>
67 lines
1.8 KiB
Diff
67 lines
1.8 KiB
Diff
From 57d147c02fdcbae5e61ba322d51c5734f9511fd7 Mon Sep 17 00:00:00 2001
|
|
From: Mingkai Hu <mingkai.hu@nxp.com>
|
|
Date: Mon, 26 Sep 2016 14:19:32 +0800
|
|
Subject: [PATCH 134/141] pci/layerscape: add LUT DBG reigster offset member
|
|
|
|
commit 59ab37d6f46356a5b9755fcec74b23616dfdd62f
|
|
[doesn't apply pm part]
|
|
|
|
Different chip have different LUT debug register offset,
|
|
so add a member to avoid macro redifinition.
|
|
|
|
Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com>
|
|
Integrated-by: Zhao Qiang <qiang.zhao@nxp.com>
|
|
Integrated-by: Yutang Jiang <yutang.jiang@nxp.com>
|
|
---
|
|
drivers/pci/host/pci-layerscape.c | 8 ++++++--
|
|
1 file changed, 6 insertions(+), 2 deletions(-)
|
|
|
|
--- a/drivers/pci/host/pci-layerscape.c
|
|
+++ b/drivers/pci/host/pci-layerscape.c
|
|
@@ -41,6 +41,7 @@
|
|
struct ls_pcie_drvdata {
|
|
u32 lut_offset;
|
|
u32 ltssm_shift;
|
|
+ u32 lut_dbg;
|
|
struct pcie_host_ops *ops;
|
|
};
|
|
|
|
@@ -134,7 +135,7 @@ static int ls_pcie_link_up(struct pcie_p
|
|
struct ls_pcie *pcie = to_ls_pcie(pp);
|
|
u32 state;
|
|
|
|
- state = (ioread32(pcie->lut + PCIE_LUT_DBG) >>
|
|
+ state = (ioread32(pcie->lut + pcie->drvdata->lut_dbg) >>
|
|
pcie->drvdata->ltssm_shift) &
|
|
LTSSM_STATE_MASK;
|
|
|
|
@@ -196,24 +197,28 @@ static struct ls_pcie_drvdata ls1021_drvdata = {
|
|
static struct ls_pcie_drvdata ls1012_drvdata = {
|
|
.lut_offset = 0xC0000,
|
|
.ltssm_shift = 24,
|
|
+ .lut_dbg = 0x7fc,
|
|
.ops = &ls_pcie_host_ops,
|
|
};
|
|
|
|
static struct ls_pcie_drvdata ls1043_drvdata = {
|
|
.lut_offset = 0x10000,
|
|
.ltssm_shift = 24,
|
|
+ .lut_dbg = 0x7fc,
|
|
.ops = &ls_pcie_host_ops,
|
|
};
|
|
|
|
static struct ls_pcie_drvdata ls1046_drvdata = {
|
|
- .lut_offset = 0x10000,
|
|
+ .lut_offset = 0x80000,
|
|
.ltssm_shift = 24,
|
|
+ .lut_dbg = 0x407fc,
|
|
.ops = &ls_pcie_host_ops,
|
|
};
|
|
|
|
static struct ls_pcie_drvdata ls2080_drvdata = {
|
|
.lut_offset = 0x80000,
|
|
.ltssm_shift = 0,
|
|
+ .lut_dbg = 0x7fc,
|
|
.ops = &ls_pcie_host_ops,
|
|
};
|
|
|