f0a5f24217
- two upstreamed patches removed - compile tested all targets using 4.1 - run tested ar71xx Signed-off-by: Roman Yeryomin <roman@advem.lv> Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> SVN-Revision: 47694
48 lines
1.7 KiB
Diff
48 lines
1.7 KiB
Diff
From fe43da8836dbf8e48377d208000877a17e465f3f Mon Sep 17 00:00:00 2001
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From: Chaotian Jing <chaotian.jing@mediatek.com>
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Date: Mon, 15 Jun 2015 19:20:47 +0800
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Subject: [PATCH 34/76] mmc: dt-bindings: add Mediatek MMC bindings
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Document the device-tree binding of Mediatek MMC host
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Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com>
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---
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Documentation/devicetree/bindings/mmc/mtk-sd.txt | 32 ++++++++++++++++++++++
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1 file changed, 32 insertions(+)
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create mode 100644 Documentation/devicetree/bindings/mmc/mtk-sd.txt
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--- /dev/null
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+++ b/Documentation/devicetree/bindings/mmc/mtk-sd.txt
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@@ -0,0 +1,32 @@
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+* MTK MMC controller
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+
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+The MTK MSDC can act as a MMC controller
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+to support MMC, SD, and SDIO types of memory cards.
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+
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+This file documents differences between the core properties in mmc.txt
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+and the properties used by the msdc driver.
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+
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+Required properties:
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+- compatible: Should be "mediatek,mt8173-mmc","mediatek,mt8135-mmc"
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+- interrupts: Should contain MSDC interrupt number
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+- clocks: MSDC source clock, HCLK
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+- clock-names: "source", "hclk"
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+- pinctrl-names: should be "default", "state_uhs"
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+- pinctrl-0: should contain default/high speed pin ctrl
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+- pinctrl-1: should contain uhs mode pin ctrl
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+- vmmc-supply: power to the Core
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+- vqmmc-supply: power to the IO
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+
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+Examples:
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+mmc0: mmc@11230000 {
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+ compatible = "mediatek,mt8173-mmc", "mediatek,mt8135-mmc";
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+ reg = <0 0x11230000 0 0x108>;
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+ interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_LOW>;
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+ vmmc-supply = <&mt6397_vemc_3v3_reg>;
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+ vqmmc-supply = <&mt6397_vio18_reg>;
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+ clocks = <&pericfg CLK_PERI_MSDC30_0>, <&topckgen CLK_TOP_MSDC50_0_H_SEL>;
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+ clock-names = "source", "hclk";
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+ pinctrl-names = "default", "state_uhs";
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+ pinctrl-0 = <&mmc0_pins_default>;
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+ pinctrl-1 = <&mmc0_pins_uhs>;
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+};
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