7b33f6c1bb
As at this commit, DSA is not enabled in the kernel config for mvebu, so these nodes have been ignored. In preparation for the first mvebu board using DSA, disable these nodes for existing boards to avoid issues. Signed-off-by: Ryan Mounce <ryan@mounce.com.au>
124 lines
2.9 KiB
Diff
124 lines
2.9 KiB
Diff
From 09a0122c74ec076e08512f1b00b7ccb8a450282f Mon Sep 17 00:00:00 2001
|
|
From: Russell King <rmk+kernel@arm.linux.org.uk>
|
|
Date: Tue, 29 Nov 2016 10:15:43 +0000
|
|
Subject: ARM: dts: armada388-clearfog: document MPP usage
|
|
|
|
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
|
|
---
|
|
arch/arm/boot/dts/armada-388-clearfog-base.dts | 51 ++++++++++++++++++++++++++
|
|
arch/arm/boot/dts/armada-388-clearfog.dts | 50 +++++++++++++++++++++++++
|
|
2 files changed, 101 insertions(+)
|
|
|
|
--- a/arch/arm/boot/dts/armada-388-clearfog-base.dts
|
|
+++ b/arch/arm/boot/dts/armada-388-clearfog-base.dts
|
|
@@ -108,3 +108,54 @@
|
|
marvell,function = "gpio";
|
|
};
|
|
};
|
|
+
|
|
+/*
|
|
+MPP
|
|
+18: pu gpio pca9655 int
|
|
+19: gpio phy reset
|
|
+20: pu gpio sd0 detect
|
|
+21: sd0:cmd
|
|
+22: pd gpio mikro int
|
|
+23:
|
|
+
|
|
+24: ua1:rxd mikro rx
|
|
+25: ua1:txd mikro tx
|
|
+26: pu i2c1:sck
|
|
+27: pu i2c1:sda
|
|
+28: sd0:clk
|
|
+29: pd gpio mikro rst
|
|
+30:
|
|
+31:
|
|
+
|
|
+32:
|
|
+33:
|
|
+34:
|
|
+35:
|
|
+36:
|
|
+37: sd0:d3
|
|
+38: sd0:d0
|
|
+39: sd0:d1
|
|
+
|
|
+40: sd0:d2
|
|
+41:
|
|
+42:
|
|
+43: spi1:cs2 mikro cs
|
|
+44: gpio rear button sw3
|
|
+45: ref:clk_out0 phy#0 clock
|
|
+46: ref:clk_out1 phy#1 clock
|
|
+47:
|
|
+
|
|
+48: gpio J18 spare gpio
|
|
+49: gpio U10 I2C_IRQ(GNSS)
|
|
+50: gpio board id?
|
|
+51:
|
|
+52:
|
|
+53:
|
|
+54: gpio mikro pwm
|
|
+55:
|
|
+
|
|
+56: pu spi1:mosi mikro mosi
|
|
+57: pd spi1:sck mikro sck
|
|
+58: spi1:miso mikro miso
|
|
+59:
|
|
+*/
|
|
--- a/arch/arm/boot/dts/armada-388-clearfog.dts
|
|
+++ b/arch/arm/boot/dts/armada-388-clearfog.dts
|
|
@@ -290,3 +290,53 @@
|
|
*/
|
|
pinctrl-0 = <&spi1_pins &clearfog_spi1_cs_pins &mikro_spi_pins>;
|
|
};
|
|
+/*
|
|
++#define A38x_CUSTOMER_BOARD_1_MPP16_23 0x00400011
|
|
+MPP18: gpio ? (pca9655 int?)
|
|
+MPP19: gpio ? (clkreq?)
|
|
+MPP20: gpio ? (sd0 detect)
|
|
+MPP21: sd0:cmd x sd0
|
|
+MPP22: gpio x mikro int
|
|
+MPP23: gpio x switch irq
|
|
++#define A38x_CUSTOMER_BOARD_1_MPP24_31 0x22043333
|
|
+MPP24: ua1:rxd x mikro rx
|
|
+MPP25: ua1:txd x mikro tx
|
|
+MPP26: i2c1:sck x mikro sck
|
|
+MPP27: i2c1:sda x mikro sda
|
|
+MPP28: sd0:clk x sd0
|
|
+MPP29: gpio x mikro rst
|
|
+MPP30: ge1:txd2 ? (config)
|
|
+MPP31: ge1:txd3 ? (config)
|
|
++#define A38x_CUSTOMER_BOARD_1_MPP32_39 0x44400002
|
|
+MPP32: ge1:txctl ? (unused)
|
|
+MPP33: gpio ? (pic_com0)
|
|
+MPP34: gpio x rear button (pic_com1)
|
|
+MPP35: gpio ? (pic_com2)
|
|
+MPP36: gpio ? (unused)
|
|
+MPP37: sd0:d3 x sd0
|
|
+MPP38: sd0:d0 x sd0
|
|
+MPP39: sd0:d1 x sd0
|
|
++#define A38x_CUSTOMER_BOARD_1_MPP40_47 0x41144004
|
|
+MPP40: sd0:d2 x sd0
|
|
+MPP41: gpio x switch reset
|
|
+MPP42: gpio ? sw1-1
|
|
+MPP43: spi1:cs2 x mikro cs
|
|
+MPP44: sata3:prsnt ? (unused)
|
|
+MPP45: ref:clk_out0 ?
|
|
+MPP46: ref:clk_out1 x switch clk
|
|
+MPP47: 4 ? (unused)
|
|
++#define A38x_CUSTOMER_BOARD_1_MPP48_55 0x40333333
|
|
+MPP48: tdm:pclk
|
|
+MPP49: tdm:fsync
|
|
+MPP50: tdm:drx
|
|
+MPP51: tdm:dtx
|
|
+MPP52: tdm:int
|
|
+MPP53: tdm:rst
|
|
+MPP54: gpio ? (pwm)
|
|
+MPP55: spi1:cs1 x slic
|
|
++#define A38x_CUSTOMER_BOARD_1_MPP56_63 0x00004444
|
|
+MPP56: spi1:mosi x mikro mosi
|
|
+MPP57: spi1:sck x mikro sck
|
|
+MPP58: spi1:miso x mikro miso
|
|
+MPP59: spi1:cs0 x w25q32
|
|
+*/
|