c6c731fe31
Add support for NXP layerscape ls1043ardb 64b/32b Dev board. LS1043a is an SoC with 4x64-bit up to 1.6 GHz ARMv8 A53 cores. ls1043ardb support features as: 2GB DDR4, 128MB NOR/512MB NAND, USB3.0, eSDHC, I2C, GPIO, PCIe/Mini-PCIe, 6x1G/1x10G network port, etc. 64b/32b ls1043ardb target is using 4.4 kernel, and rcw/u-boot/fman images from NXP QorIQ SDK release. All of 4.4 kernel patches porting from SDK release or upstream. QorIQ SDK ISOs can be downloaded from this location: http://www.nxp.com/products/software-and-tools/run-time-software/linux-sdk/linux-sdk-for-qoriq-processors:SDKLINUX Signed-off-by: Yutang Jiang <yutang.jiang@nxp.com>
79 lines
3.3 KiB
Diff
79 lines
3.3 KiB
Diff
From 03eea243622d85d59653ee076ce43ac0653dc51d Mon Sep 17 00:00:00 2001
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From: Zhao Qiang <B45475@freescale.com>
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Date: Fri, 10 Oct 2014 10:38:48 +0800
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Subject: [PATCH 39/70] arch: arm: add ARM specific fucntions required for
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ehci fsl driver
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Add below functions for ARM platform which are used by ehci fsl driver:
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1. spin_event_timeout function
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2. set/clear bits functions
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Signed-off-by: Zhao Qiang <B45475@freescale.com>
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Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
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---
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arch/arm/include/asm/delay.h | 16 ++++++++++++++++
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arch/arm/include/asm/io.h | 28 ++++++++++++++++++++++++++++
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2 files changed, 44 insertions(+)
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--- a/arch/arm/include/asm/delay.h
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+++ b/arch/arm/include/asm/delay.h
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@@ -57,6 +57,22 @@ extern void __bad_udelay(void);
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__const_udelay((n) * UDELAY_MULT)) : \
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__udelay(n))
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+#define spin_event_timeout(condition, timeout, delay) \
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+({ \
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+ typeof(condition) __ret; \
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+ int i = 0; \
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+ while (!(__ret = (condition)) && (i++ < timeout)) { \
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+ if (delay) \
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+ udelay(delay); \
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+ else \
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+ cpu_relax(); \
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+ udelay(1); \
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+ } \
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+ if (!__ret) \
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+ __ret = (condition); \
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+ __ret; \
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+})
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+
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/* Loop-based definitions for assembly code. */
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extern void __loop_delay(unsigned long loops);
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extern void __loop_udelay(unsigned long usecs);
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--- a/arch/arm/include/asm/io.h
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+++ b/arch/arm/include/asm/io.h
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@@ -221,6 +221,34 @@ extern int pci_ioremap_io(unsigned int o
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#endif
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#endif
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+/* access ports */
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+#define setbits32(_addr, _v) iowrite32be(ioread32be(_addr) | (_v), (_addr))
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+#define clrbits32(_addr, _v) iowrite32be(ioread32be(_addr) & ~(_v), (_addr))
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+
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+#define setbits16(_addr, _v) iowrite16be(ioread16be(_addr) | (_v), (_addr))
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+#define clrbits16(_addr, _v) iowrite16be(ioread16be(_addr) & ~(_v), (_addr))
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+
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+#define setbits8(_addr, _v) iowrite8(ioread8(_addr) | (_v), (_addr))
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+#define clrbits8(_addr, _v) iowrite8(ioread8(_addr) & ~(_v), (_addr))
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+
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+/* Clear and set bits in one shot. These macros can be used to clear and
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+ * set multiple bits in a register using a single read-modify-write. These
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+ * macros can also be used to set a multiple-bit bit pattern using a mask,
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+ * by specifying the mask in the 'clear' parameter and the new bit pattern
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+ * in the 'set' parameter.
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+ */
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+
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+#define clrsetbits_be32(addr, clear, set) \
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+ iowrite32be((ioread32be(addr) & ~(clear)) | (set), (addr))
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+#define clrsetbits_le32(addr, clear, set) \
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+ iowrite32le((ioread32le(addr) & ~(clear)) | (set), (addr))
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+#define clrsetbits_be16(addr, clear, set) \
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+ iowrite16be((ioread16be(addr) & ~(clear)) | (set), (addr))
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+#define clrsetbits_le16(addr, clear, set) \
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+ iowrite16le((ioread16le(addr) & ~(clear)) | (set), (addr))
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+#define clrsetbits_8(addr, clear, set) \
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+ iowrite8((ioread8(addr) & ~(clear)) | (set), (addr))
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+
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/*
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* IO port access primitives
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* -------------------------
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