07532dca7f
Also refresh the related generic/platform patches. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> SVN-Revision: 36039
29 lines
1.2 KiB
Diff
29 lines
1.2 KiB
Diff
From 5be3837d01ea56e1455781f1b51764bd896973f2 Mon Sep 17 00:00:00 2001
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From: John Crispin <blogic@openwrt.org>
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Date: Thu, 6 Dec 2012 11:59:23 +0100
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Subject: [PATCH 20/40] MIPS: lantiq: adds 4dword burst length for dma
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---
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arch/mips/lantiq/xway/dma.c | 4 +++-
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1 file changed, 3 insertions(+), 1 deletion(-)
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--- a/arch/mips/lantiq/xway/dma.c
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+++ b/arch/mips/lantiq/xway/dma.c
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@@ -47,6 +47,7 @@
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#define DMA_IRQ_ACK 0x7e /* IRQ status register */
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#define DMA_POLL BIT(31) /* turn on channel polling */
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#define DMA_CLK_DIV4 BIT(6) /* polling clock divider */
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+#define DMA_4W_BURST BIT(2) /* 4 word burst length */
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#define DMA_2W_BURST BIT(1) /* 2 word burst length */
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#define DMA_MAX_CHANNEL 20 /* the soc has 20 channels */
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#define DMA_ETOP_ENDIANNESS (0xf << 8) /* endianness swap etop channels */
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@@ -195,7 +196,8 @@ ltq_dma_init_port(int p)
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* Tell the DMA engine to swap the endianness of data frames and
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* drop packets if the channel arbitration fails.
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*/
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- ltq_dma_w32_mask(0, DMA_ETOP_ENDIANNESS | DMA_PDEN,
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+ ltq_dma_w32_mask(0, (DMA_4W_BURST << 4) | (DMA_4W_BURST << 2) |
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+ DMA_ETOP_ENDIANNESS | DMA_PDEN,
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LTQ_DMA_PCTRL);
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break;
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