129 lines
3.5 KiB
Diff
129 lines
3.5 KiB
Diff
From 6c6bc98f6a2b1f91071564efdb77c90307610018 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?David=20Lanzend=C3=B6rfer?= <david.lanzendoerfer@o2s.ch>
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Date: Sat, 15 Feb 2014 14:02:51 +0100
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Subject: [PATCH] ARM: dts: sun4i: Add support for mmc
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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Signed-off-by: David Lanzendörfer <david.lanzendoerfer@o2s.ch>
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Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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---
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arch/arm/boot/dts/sun4i-a10-a1000.dts | 8 +++++
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arch/arm/boot/dts/sun4i-a10-cubieboard.dts | 8 +++++
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arch/arm/boot/dts/sun4i-a10.dtsi | 54 ++++++++++++++++++++++++++++++
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3 files changed, 70 insertions(+)
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diff --git a/arch/arm/boot/dts/sun4i-a10-a1000.dts b/arch/arm/boot/dts/sun4i-a10-a1000.dts
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index d6ec839..4b2a694 100644
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--- a/arch/arm/boot/dts/sun4i-a10-a1000.dts
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+++ b/arch/arm/boot/dts/sun4i-a10-a1000.dts
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@@ -35,6 +35,14 @@
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};
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};
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+ mmc0: mmc@01c0f000 {
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+ pinctrl-names = "default", "default";
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+ pinctrl-0 = <&mmc0_pins_a>;
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+ pinctrl-1 = <&mmc0_cd_pin_reference_design>;
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+ cd-gpios = <&pio 7 1 0>; /* PH1 */
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+ status = "okay";
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+ };
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+
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ahci: sata@01c18000 {
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status = "okay";
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};
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diff --git a/arch/arm/boot/dts/sun4i-a10-cubieboard.dts b/arch/arm/boot/dts/sun4i-a10-cubieboard.dts
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index 6df237d8..ef85b8e 100644
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--- a/arch/arm/boot/dts/sun4i-a10-cubieboard.dts
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+++ b/arch/arm/boot/dts/sun4i-a10-cubieboard.dts
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@@ -34,6 +34,14 @@
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};
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};
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+ mmc0: mmc@01c0f000 {
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+ pinctrl-names = "default", "default";
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+ pinctrl-0 = <&mmc0_pins_a>;
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+ pinctrl-1 = <&mmc0_cd_pin_reference_design>;
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+ cd-gpios = <&pio 7 1 0>; /* PH1 */
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+ status = "okay";
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+ };
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+
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ahci: sata@01c18000 {
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target-supply = <®_ahci_5v>;
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status = "okay";
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diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi
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index 454077a..a8e0df3 100644
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--- a/arch/arm/boot/dts/sun4i-a10.dtsi
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+++ b/arch/arm/boot/dts/sun4i-a10.dtsi
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@@ -338,6 +338,46 @@
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#size-cells = <0>;
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};
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+ mmc0: mmc@01c0f000 {
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+ compatible = "allwinner,sun5i-a13-mmc";
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+ reg = <0x01c0f000 0x1000>;
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+ clocks = <&ahb_gates 8>, <&mmc0_clk>;
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+ clock-names = "ahb", "mod";
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+ interrupts = <32>;
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+ bus-width = <4>;
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+ status = "disabled";
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+ };
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+
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+ mmc1: mmc@01c10000 {
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+ compatible = "allwinner,sun5i-a13-mmc";
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+ reg = <0x01c10000 0x1000>;
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+ clocks = <&ahb_gates 9>, <&mmc1_clk>;
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+ clock-names = "ahb", "mod";
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+ interrupts = <33>;
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+ bus-width = <4>;
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+ status = "disabled";
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+ };
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+
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+ mmc2: mmc@01c11000 {
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+ compatible = "allwinner,sun5i-a13-mmc";
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+ reg = <0x01c11000 0x1000>;
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+ clocks = <&ahb_gates 10>, <&mmc2_clk>;
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+ clock-names = "ahb", "mod";
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+ interrupts = <34>;
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+ bus-width = <4>;
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+ status = "disabled";
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+ };
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+
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+ mmc3: mmc@01c12000 {
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+ compatible = "allwinner,sun5i-a13-mmc";
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+ reg = <0x01c12000 0x1000>;
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+ clocks = <&ahb_gates 11>, <&mmc3_clk>;
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+ clock-names = "ahb", "mod";
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+ interrupts = <35>;
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+ bus-width = <4>;
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+ status = "disabled";
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+ };
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+
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ahci: sata@01c18000 {
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compatible = "allwinner,sun4i-a10-ahci";
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reg = <0x01c18000 0x1000>;
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@@ -416,6 +456,20 @@
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allwinner,drive = <0>;
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allwinner,pull = <0>;
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};
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+
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+ mmc0_pins_a: mmc0@0 {
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+ allwinner,pins = "PF0","PF1","PF2","PF3","PF4","PF5";
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+ allwinner,function = "mmc0";
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+ allwinner,drive = <3>;
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+ allwinner,pull = <0>;
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+ };
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+
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+ mmc0_cd_pin_reference_design: mmc0_cd_pin@0 {
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+ allwinner,pins = "PH1";
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+ allwinner,function = "gpio_in";
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+ allwinner,drive = <0>;
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+ allwinner,pull = <1>;
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+ };
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};
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timer@01c20c00 {
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--
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1.8.5.5
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