305 lines
8.7 KiB
Diff
305 lines
8.7 KiB
Diff
From a52ae09871d171d6771b4bef2d4c56dd435e740f Mon Sep 17 00:00:00 2001
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From: Roger Quadros <rogerq@ti.com>
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Date: Mon, 20 Jan 2014 16:32:33 +0200
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Subject: [PATCH] ata: ahci_platform: Add DT compatible for Synopsis DWC AHCI
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controller
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Add compatible string "snps,dwc-ahci", which should be used
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for Synopsis Designware SATA cores. e.g. on TI OMAP5 and DRA7 platforms.
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Signed-off-by: Roger Quadros <rogerq@ti.com>
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Reviewed-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
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Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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---
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drivers/ata/ahci_platform.c | 1 +
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1 file changed, 1 insertion(+)
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diff --git a/drivers/ata/ahci_platform.c b/drivers/ata/ahci_platform.c
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index bdadec1..d7e55ba 100644
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--- a/drivers/ata/ahci_platform.c
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+++ b/drivers/ata/ahci_platform.c
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@@ -609,6 +609,7 @@ static const struct of_device_id ahci_of_match[] = {
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{ .compatible = "snps,spear-ahci", },
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{ .compatible = "snps,exynos5440-ahci", },
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{ .compatible = "ibm,476gtr-ahci", },
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+ { .compatible = "snps,dwc-ahci", },
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{},
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};
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MODULE_DEVICE_TABLE(of, ahci_of_match);
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--
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2.0.3
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From 2be39fa6b6531bd083c766999345adc348b14c77 Mon Sep 17 00:00:00 2001
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From: Roger Quadros <rogerq@ti.com>
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Date: Mon, 27 Jan 2014 16:41:18 +0200
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Subject: [PATCH] ata: ahci_platform: Manage SATA PHY
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Some platforms have a PHY hooked up to the
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SATA controller. The PHY needs to be initialized
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and powered up for SATA to work. We do that
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using the PHY framework.
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CC: Balaji T K <balajitk@ti.com>
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Signed-off-by: Roger Quadros <rogerq@ti.com>
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Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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---
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drivers/ata/ahci.h | 2 ++
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drivers/ata/ahci_platform.c | 47 +++++++++++++++++++++++++++++++++++++++++++--
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2 files changed, 47 insertions(+), 2 deletions(-)
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diff --git a/drivers/ata/ahci.h b/drivers/ata/ahci.h
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index bf8100c..3ab7ac9 100644
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--- a/drivers/ata/ahci.h
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+++ b/drivers/ata/ahci.h
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@@ -37,6 +37,7 @@
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#include <linux/clk.h>
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#include <linux/libata.h>
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+#include <linux/phy/phy.h>
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#include <linux/regulator/consumer.h>
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/* Enclosure Management Control */
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@@ -325,6 +326,7 @@ struct ahci_host_priv {
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u32 em_msg_type; /* EM message type */
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struct clk *clks[AHCI_MAX_CLKS]; /* Optional */
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struct regulator *target_pwr; /* Optional */
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+ struct phy *phy; /* If platform uses phy */
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void *plat_data; /* Other platform data */
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/*
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* Optional ahci_start_engine override, if not set this gets set to the
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diff --git a/drivers/ata/ahci_platform.c b/drivers/ata/ahci_platform.c
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index d7e55ba..99d38c1 100644
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--- a/drivers/ata/ahci_platform.c
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+++ b/drivers/ata/ahci_platform.c
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@@ -23,6 +23,7 @@
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#include <linux/platform_device.h>
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#include <linux/libata.h>
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#include <linux/ahci_platform.h>
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+#include <linux/phy/phy.h>
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#include "ahci.h"
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static void ahci_host_stop(struct ata_host *host);
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@@ -147,6 +148,7 @@ EXPORT_SYMBOL_GPL(ahci_platform_disable_clks);
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* the following order:
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* 1) Regulator
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* 2) Clocks (through ahci_platform_enable_clks)
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+ * 3) Phy
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*
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* If resource enabling fails at any point the previous enabled
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* resources are disabled in reverse order.
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@@ -171,8 +173,23 @@ int ahci_platform_enable_resources(struct ahci_host_priv *hpriv)
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if (rc)
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goto disable_regulator;
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+ if (hpriv->phy) {
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+ rc = phy_init(hpriv->phy);
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+ if (rc)
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+ goto disable_clks;
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+
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+ rc = phy_power_on(hpriv->phy);
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+ if (rc) {
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+ phy_exit(hpriv->phy);
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+ goto disable_clks;
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+ }
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+ }
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+
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return 0;
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+disable_clks:
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+ ahci_platform_disable_clks(hpriv);
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+
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disable_regulator:
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if (hpriv->target_pwr)
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regulator_disable(hpriv->target_pwr);
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@@ -186,14 +203,20 @@ EXPORT_SYMBOL_GPL(ahci_platform_enable_resources);
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*
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* This function disables all ahci_platform managed resources in
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* the following order:
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- * 1) Clocks (through ahci_platform_disable_clks)
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- * 2) Regulator
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+ * 1) Phy
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+ * 2) Clocks (through ahci_platform_disable_clks)
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+ * 3) Regulator
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*
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* LOCKING:
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* None.
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*/
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void ahci_platform_disable_resources(struct ahci_host_priv *hpriv)
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{
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+ if (hpriv->phy) {
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+ phy_power_off(hpriv->phy);
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+ phy_exit(hpriv->phy);
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+ }
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+
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ahci_platform_disable_clks(hpriv);
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if (hpriv->target_pwr)
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@@ -222,6 +245,7 @@ static void ahci_platform_put_resources(struct device *dev, void *res)
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* 2) regulator for controlling the targets power (optional)
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* 3) 0 - AHCI_MAX_CLKS clocks, as specified in the devs devicetree node,
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* or for non devicetree enabled platforms a single clock
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+ * 4) phy (optional)
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*
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* LOCKING:
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* None.
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@@ -283,6 +307,25 @@ struct ahci_host_priv *ahci_platform_get_resources(
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hpriv->clks[i] = clk;
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}
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+ hpriv->phy = devm_phy_get(dev, "sata-phy");
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+ if (IS_ERR(hpriv->phy)) {
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+ rc = PTR_ERR(hpriv->phy);
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+ switch (rc) {
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+ case -ENODEV:
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+ case -ENOSYS:
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+ /* continue normally */
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+ hpriv->phy = NULL;
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+ break;
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+
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+ case -EPROBE_DEFER:
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+ goto err_out;
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+
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+ default:
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+ dev_err(dev, "couldn't get sata-phy\n");
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+ goto err_out;
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+ }
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+ }
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+
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devres_remove_group(dev, NULL);
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return hpriv;
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--
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2.0.3
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From 22d93de35a39507bcdf0c62c5e1fab0625f7c6f6 Mon Sep 17 00:00:00 2001
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From: Roger Quadros <rogerq@ti.com>
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Date: Wed, 9 Oct 2013 15:08:59 +0300
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Subject: [PATCH] ata: ahci_platform: runtime resume the device before use
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On OMAP platforms the device needs to be runtime resumed before
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it can be accessed. The OMAP HWMOD framework takes care of
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enabling the module and its resources based on the
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device's runtime PM state.
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In this patch we runtime resume during .probe() and runtime suspend
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after .remove().
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We also update the runtime PM state during .resume().
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CC: Balaji T K <balajitk@ti.com>
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Signed-off-by: Roger Quadros <rogerq@ti.com>
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Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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---
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drivers/ata/ahci.h | 1 +
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drivers/ata/ahci_platform.c | 15 +++++++++++++++
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2 files changed, 16 insertions(+)
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diff --git a/drivers/ata/ahci.h b/drivers/ata/ahci.h
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index 3ab7ac9..51af275b 100644
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--- a/drivers/ata/ahci.h
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+++ b/drivers/ata/ahci.h
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@@ -324,6 +324,7 @@ struct ahci_host_priv {
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u32 em_loc; /* enclosure management location */
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u32 em_buf_sz; /* EM buffer size in byte */
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u32 em_msg_type; /* EM message type */
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+ bool got_runtime_pm; /* Did we do pm_runtime_get? */
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struct clk *clks[AHCI_MAX_CLKS]; /* Optional */
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struct regulator *target_pwr; /* Optional */
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struct phy *phy; /* If platform uses phy */
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diff --git a/drivers/ata/ahci_platform.c b/drivers/ata/ahci_platform.c
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index 99d38c1..75698a4 100644
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--- a/drivers/ata/ahci_platform.c
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+++ b/drivers/ata/ahci_platform.c
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@@ -24,6 +24,7 @@
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#include <linux/libata.h>
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#include <linux/ahci_platform.h>
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#include <linux/phy/phy.h>
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+#include <linux/pm_runtime.h>
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#include "ahci.h"
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static void ahci_host_stop(struct ata_host *host);
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@@ -229,6 +230,11 @@ static void ahci_platform_put_resources(struct device *dev, void *res)
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struct ahci_host_priv *hpriv = res;
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int c;
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+ if (hpriv->got_runtime_pm) {
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+ pm_runtime_put_sync(dev);
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+ pm_runtime_disable(dev);
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+ }
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+
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for (c = 0; c < AHCI_MAX_CLKS && hpriv->clks[c]; c++)
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clk_put(hpriv->clks[c]);
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}
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@@ -326,6 +332,10 @@ struct ahci_host_priv *ahci_platform_get_resources(
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}
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}
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+ pm_runtime_enable(dev);
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+ pm_runtime_get_sync(dev);
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+ hpriv->got_runtime_pm = true;
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+
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devres_remove_group(dev, NULL);
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return hpriv;
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@@ -635,6 +645,11 @@ int ahci_platform_resume(struct device *dev)
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if (rc)
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goto disable_resources;
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+ /* We resumed so update PM runtime state */
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+ pm_runtime_disable(dev);
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+ pm_runtime_set_active(dev);
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+ pm_runtime_enable(dev);
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+
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return 0;
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disable_resources:
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--
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2.0.3
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From 22cccaf7a29b2a9d8a1440d089f399a6d2432b81 Mon Sep 17 00:00:00 2001
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From: Hans de Goede <hdegoede@redhat.com>
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Date: Sun, 23 Feb 2014 11:37:17 +0100
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Subject: [PATCH] ahci_sunxi: Use msleep instead of mdelay
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ahci_sunxi_phy_init is called from the probe and resume code paths, and
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sleeping is safe in both, so use msleep instead of mdelay.
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Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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---
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drivers/ata/ahci_sunxi.c | 6 +++---
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1 file changed, 3 insertions(+), 3 deletions(-)
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diff --git a/drivers/ata/ahci_sunxi.c b/drivers/ata/ahci_sunxi.c
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index 001f7dfc..d1bf3f7 100644
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--- a/drivers/ata/ahci_sunxi.c
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+++ b/drivers/ata/ahci_sunxi.c
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@@ -90,7 +90,7 @@ static int ahci_sunxi_phy_init(struct device *dev, void __iomem *reg_base)
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/* This magic is from the original code */
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writel(0, reg_base + AHCI_RWCR);
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- mdelay(5);
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+ msleep(5);
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sunxi_setbits(reg_base + AHCI_PHYCS1R, BIT(19));
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sunxi_clrsetbits(reg_base + AHCI_PHYCS0R,
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@@ -105,7 +105,7 @@ static int ahci_sunxi_phy_init(struct device *dev, void __iomem *reg_base)
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(0x7 << 20), (0x3 << 20));
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sunxi_clrsetbits(reg_base + AHCI_PHYCS2R,
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(0x1f << 5), (0x19 << 5));
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- mdelay(5);
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+ msleep(5);
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sunxi_setbits(reg_base + AHCI_PHYCS0R, (0x1 << 19));
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@@ -137,7 +137,7 @@ static int ahci_sunxi_phy_init(struct device *dev, void __iomem *reg_base)
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udelay(1);
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} while (1);
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- mdelay(15);
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+ msleep(15);
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writel(0x7, reg_base + AHCI_RWCR);
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--
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2.0.3
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