1f068588ef
Signed-off-by: Muciri Gatimu <muciri@openmesh.com> Signed-off-by: Shashidhar Lakkavalli <shashidhar.lakkavalli@openmesh.com> Signed-off-by: John Crispin <john@phrozen.org>
30 lines
866 B
Diff
30 lines
866 B
Diff
From 600e2bd5c3019f31e90ec876f4efb6c209cf0d73 Mon Sep 17 00:00:00 2001
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From: John Crispin <blogic@openwrt.org>
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Date: Wed, 6 Jan 2016 20:06:49 +0100
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Subject: [PATCH 10/57] clk: add hifsys reset
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Hi,
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small patch to add hifsys reset bits. Maybe you could add it to the next
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version of your patch series. i have teste scpsys and clk on mt7623 today
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and it works well.
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thanks,
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John
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Signed-off-by: John Crispin <blogic@openwrt.org>
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---
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drivers/clk/mediatek/clk-mt2701.c | 2 ++
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1 file changed, 2 insertions(+)
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--- a/drivers/clk/mediatek/clk-mt2701.c
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+++ b/drivers/clk/mediatek/clk-mt2701.c
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@@ -1000,6 +1000,8 @@ static void __init mtk_hifsys_init(struc
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if (r)
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pr_err("%s(): could not register clock provider: %d\n",
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__func__, r);
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+
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+ mtk_register_reset_controller(node, 1, 0x34);
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}
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CLK_OF_DECLARE(mtk_hifsys, "mediatek,mt2701-hifsys", mtk_hifsys_init);
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