122 lines
3.3 KiB
Diff
122 lines
3.3 KiB
Diff
From 756b919b7874cc241a276b4fc5bbec5b3fb4bca8 Mon Sep 17 00:00:00 2001
|
|
From: John Crispin <blogic@openwrt.org>
|
|
Date: Wed, 20 Jan 2016 05:27:17 +0100
|
|
Subject: [PATCH 033/102] soc: mediatek: PMIC wrap: add wrapper callbacks for
|
|
init_reg_clock
|
|
|
|
Split init_reg_clock up into SoC specific callbacks. The patch also
|
|
reorders the code to avoid the need for callback function prototypes.
|
|
|
|
Signed-off-by: John Crispin <blogic@openwrt.org>
|
|
---
|
|
drivers/soc/mediatek/mtk-pmic-wrap.c | 70 ++++++++++++++++++----------------
|
|
1 file changed, 38 insertions(+), 32 deletions(-)
|
|
|
|
--- a/drivers/soc/mediatek/mtk-pmic-wrap.c
|
|
+++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
|
|
@@ -354,24 +354,6 @@ enum pwrap_type {
|
|
PWRAP_MT8173,
|
|
};
|
|
|
|
-struct pmic_wrapper_type {
|
|
- int *regs;
|
|
- enum pwrap_type type;
|
|
- u32 arb_en_all;
|
|
-};
|
|
-
|
|
-static struct pmic_wrapper_type pwrap_mt8135 = {
|
|
- .regs = mt8135_regs,
|
|
- .type = PWRAP_MT8135,
|
|
- .arb_en_all = 0x1ff,
|
|
-};
|
|
-
|
|
-static struct pmic_wrapper_type pwrap_mt8173 = {
|
|
- .regs = mt8173_regs,
|
|
- .type = PWRAP_MT8173,
|
|
- .arb_en_all = 0x3f,
|
|
-};
|
|
-
|
|
struct pmic_wrapper {
|
|
struct device *dev;
|
|
void __iomem *base;
|
|
@@ -385,6 +367,13 @@ struct pmic_wrapper {
|
|
void __iomem *bridge_base;
|
|
};
|
|
|
|
+struct pmic_wrapper_type {
|
|
+ int *regs;
|
|
+ enum pwrap_type type;
|
|
+ u32 arb_en_all;
|
|
+ int (*init_reg_clock)(struct pmic_wrapper *wrp);
|
|
+};
|
|
+
|
|
static inline int pwrap_is_mt8135(struct pmic_wrapper *wrp)
|
|
{
|
|
return wrp->master->type == PWRAP_MT8135;
|
|
@@ -578,20 +567,23 @@ static int pwrap_init_sidly(struct pmic_
|
|
return 0;
|
|
}
|
|
|
|
-static int pwrap_init_reg_clock(struct pmic_wrapper *wrp)
|
|
+static int pwrap_mt8135_init_reg_clock(struct pmic_wrapper *wrp)
|
|
{
|
|
- if (pwrap_is_mt8135(wrp)) {
|
|
- pwrap_writel(wrp, 0x4, PWRAP_CSHEXT);
|
|
- pwrap_writel(wrp, 0x0, PWRAP_CSHEXT_WRITE);
|
|
- pwrap_writel(wrp, 0x4, PWRAP_CSHEXT_READ);
|
|
- pwrap_writel(wrp, 0x0, PWRAP_CSLEXT_START);
|
|
- pwrap_writel(wrp, 0x0, PWRAP_CSLEXT_END);
|
|
- } else {
|
|
- pwrap_writel(wrp, 0x0, PWRAP_CSHEXT_WRITE);
|
|
- pwrap_writel(wrp, 0x4, PWRAP_CSHEXT_READ);
|
|
- pwrap_writel(wrp, 0x2, PWRAP_CSLEXT_START);
|
|
- pwrap_writel(wrp, 0x2, PWRAP_CSLEXT_END);
|
|
- }
|
|
+ pwrap_writel(wrp, 0x4, PWRAP_CSHEXT);
|
|
+ pwrap_writel(wrp, 0x0, PWRAP_CSHEXT_WRITE);
|
|
+ pwrap_writel(wrp, 0x4, PWRAP_CSHEXT_READ);
|
|
+ pwrap_writel(wrp, 0x0, PWRAP_CSLEXT_START);
|
|
+ pwrap_writel(wrp, 0x0, PWRAP_CSLEXT_END);
|
|
+
|
|
+ return 0;
|
|
+}
|
|
+
|
|
+static int pwrap_mt8173_init_reg_clock(struct pmic_wrapper *wrp)
|
|
+{
|
|
+ pwrap_writel(wrp, 0x0, PWRAP_CSHEXT_WRITE);
|
|
+ pwrap_writel(wrp, 0x4, PWRAP_CSHEXT_READ);
|
|
+ pwrap_writel(wrp, 0x2, PWRAP_CSLEXT_START);
|
|
+ pwrap_writel(wrp, 0x2, PWRAP_CSLEXT_END);
|
|
|
|
return 0;
|
|
}
|
|
@@ -699,7 +691,7 @@ static int pwrap_init(struct pmic_wrappe
|
|
|
|
pwrap_writel(wrp, 1, PWRAP_WACS2_EN);
|
|
|
|
- ret = pwrap_init_reg_clock(wrp);
|
|
+ ret = wrp->master->init_reg_clock(wrp);
|
|
if (ret)
|
|
return ret;
|
|
|
|
@@ -814,6 +806,20 @@ static const struct regmap_config pwrap_
|
|
.max_register = 0xffff,
|
|
};
|
|
|
|
+static struct pmic_wrapper_type pwrap_mt8135 = {
|
|
+ .regs = mt8135_regs,
|
|
+ .type = PWRAP_MT8135,
|
|
+ .arb_en_all = 0x1ff,
|
|
+ .init_reg_clock = pwrap_mt8135_init_reg_clock,
|
|
+};
|
|
+
|
|
+static struct pmic_wrapper_type pwrap_mt8173 = {
|
|
+ .regs = mt8173_regs,
|
|
+ .type = PWRAP_MT8173,
|
|
+ .arb_en_all = 0x3f,
|
|
+ .init_reg_clock = pwrap_mt8173_init_reg_clock,
|
|
+};
|
|
+
|
|
static struct of_device_id of_pwrap_match_tbl[] = {
|
|
{
|
|
.compatible = "mediatek,mt8135-pwrap",
|