2d49e32715
- change patch numbers to group the related stuff together, - add mtd prefix where it is missing, - use hyphens in the patch names Signed-off-by: Gabor Juhos <juhosg@openwrt.org> SVN-Revision: 37974
78 lines
3.3 KiB
Diff
78 lines
3.3 KiB
Diff
From dbca80cf6b3c0d0f130cdfb4b1f19f2092f62174 Mon Sep 17 00:00:00 2001
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From: Michel Stempin <michel.stempin@wanadoo.fr>
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Date: Sun, 18 Aug 2013 00:50:26 +0200
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Subject: [PATCH v2] mtd: m25p80: add support for PMC SPI flash
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This patch adds support for PMC (now Chingis, part of ISSI) Pm25LV512 (512
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kBbit), Pm25LV010 (1 Mbit) and Pm25LQ032 (32 Mbit) SPI flash.
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Two generations of PMC SPI flash chips are addressed:
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1) Pm25LV512 and Pm25LV010 - These have 4KB sectors and 32KB blocks. The 4KB
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sector erase uses a non-standard opcode (0xd7). They do not support JEDEC RDID
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(0x9f), and so they can only be detected by matching their name string with
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pre-configured platform data. Because of the cascaded acquisitions, the
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datasheet is no longer available on the current manufacturer's website,
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although it is still commonly used in some recent wireless routers [1]. Only
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public datasheet available seems to be on GeoCities [2].
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2) Pm25LQ032 - A newer generation flash, with 4KB sectors and 32KB blocks. It
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uses the standard erase and JEDEC read-ID opcodes. Manufacturer's datasheet is
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available [3].
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[1] https://forum.openwrt.org/viewtopic.php?pid=186360#p186360
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[2] http://www.geocities.jp/scottle556/pdf/Pm25LV512-010.pdf
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[3] http://www.chingistek.com/img/Product_Files/Pm25LQ032C%20datasheet%20v1.6.1.pdf
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Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
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Signed-off-by: Michel Stempin <michel.stempin@wanadoo.fr>
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CC: Brian Norris <computersforpeace@gmail.com>
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CC: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
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---
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Changes in v2:
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- style and documentation improvements
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drivers/mtd/devices/m25p80.c | 10 ++++++++++
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1 file changed, 10 insertions(+)
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--- a/drivers/mtd/devices/m25p80.c
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+++ b/drivers/mtd/devices/m25p80.c
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@@ -45,6 +45,7 @@
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#define OPCODE_BE_4K 0x20 /* Erase 4KiB block */
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#define OPCODE_BE_32K 0x52 /* Erase 32KiB block */
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#define OPCODE_CHIP_ERASE 0xc7 /* Erase whole flash chip */
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+#define OPCODE_BE_4K_PMC 0xd7 /* Erase 4KiB block on PMC chips*/
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#define OPCODE_SE 0xd8 /* Sector erase (usually 64KiB) */
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#define OPCODE_RDID 0x9f /* Read JEDEC ID */
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@@ -682,6 +683,7 @@ struct flash_info {
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#define SECT_4K 0x01 /* OPCODE_BE_4K works uniformly */
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#define M25P_NO_ERASE 0x02 /* No erase command needed */
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#define SST_WRITE 0x04 /* use SST byte programming */
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+#define SECT_4K_PMC 0x08 /* OPCODE_BE_4K_PMC works uniformly */
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};
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#define INFO(_jedec_id, _ext_id, _sector_size, _n_sectors, _flags) \
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@@ -765,6 +767,11 @@ static const struct spi_device_id m25p_i
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{ "n25q128a13", INFO(0x20ba18, 0, 64 * 1024, 256, 0) },
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{ "n25q256a", INFO(0x20ba19, 0, 64 * 1024, 512, SECT_4K) },
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+ /* PMC -- pm25x "blocks" are 32K, sectors are 4K */
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+ { "pm25lv512", INFO(0, 0, 32 * 1024, 2, SECT_4K_PMC) },
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+ { "pm25lv010", INFO(0, 0, 32 * 1024, 4, SECT_4K_PMC) },
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+ { "pm25lq032", INFO(0x7F9D46, 0, 64 * 1024, 64, SECT_4K) },
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+
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/* Spansion -- single (large) sector size only, at least
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* for the chips listed here (without boot sectors).
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*/
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@@ -1017,6 +1024,9 @@ static int m25p_probe(struct spi_device
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if (info->flags & SECT_4K) {
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flash->erase_opcode = OPCODE_BE_4K;
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flash->mtd.erasesize = 4096;
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+ } else if (info->flags & SECT_4K_PMC) {
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+ flash->erase_opcode = OPCODE_BE_4K_PMC;
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+ flash->mtd.erasesize = 4096;
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} else {
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flash->erase_opcode = OPCODE_SE;
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flash->mtd.erasesize = info->sector_size;
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