openwrtv4/target/linux/at91/patches-2.6.22/009-fdl-uartinit.patch
Gabor Juhos d132c5f42c refresh kernel patches
SVN-Revision: 11195
2008-05-19 06:35:41 +00:00

28 lines
1.2 KiB
Diff

Index: linux-2.6.22.19/arch/arm/mach-at91/at91rm9200_devices.c
===================================================================
--- linux-2.6.22.19.orig/arch/arm/mach-at91/at91rm9200_devices.c
+++ linux-2.6.22.19/arch/arm/mach-at91/at91rm9200_devices.c
@@ -721,6 +721,10 @@ static inline void configure_usart0_pins
* We need to drive the pin manually. Default is off (RTS is active low).
*/
at91_set_gpio_output(AT91_PIN_PA21, 1);
+ at91_set_gpio_output(AT91_PIN_PB6, 1); /* DTR0 */
+ at91_set_gpio_output(AT91_PIN_PB7, 1); /* RI0 */
+ at91_set_gpio_input(AT91_PIN_PA19, 1); /* DCD0 */
+ at91_set_deglitch(AT91_PIN_PA19, 1);
}
static struct resource uart1_resources[] = {
@@ -832,6 +836,12 @@ static inline void configure_usart3_pins
{
at91_set_B_periph(AT91_PIN_PA5, 1); /* TXD3 */
at91_set_B_periph(AT91_PIN_PA6, 0); /* RXD3 */
+ at91_set_B_periph(AT91_PIN_PB0, 0); /* RTS3 */
+ at91_set_B_periph(AT91_PIN_PB1, 0); /* CTS3 */
+ at91_set_gpio_output(AT91_PIN_PB29, 1); /* DTR0 */
+ at91_set_gpio_output(AT91_PIN_PB2, 1); /* RI0 */
+ at91_set_gpio_input(AT91_PIN_PA24, 1); /* DCD0 */
+ at91_set_deglitch(AT91_PIN_PA24, 1);
}
struct platform_device *at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */