53c474abbd
This target aims to replace ar71xx mid-term. The big part that is still missing is making the MMIO/AHB wifi work using OF. NAND and mikrotik subtargets will follow. Signed-off-by: John Crispin <john@phrozen.org>
180 lines
5.4 KiB
Diff
180 lines
5.4 KiB
Diff
From e03edbc8e68063b3fca7457fa048d8abe0045f1f Mon Sep 17 00:00:00 2001
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From: John Crispin <john@phrozen.org>
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Date: Tue, 6 Mar 2018 10:15:54 +0100
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Subject: [PATCH 27/27] MIPS: ath79: drop mips_machine support
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Signed-off-by: John Crispin <john@phrozen.org>
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---
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arch/mips/Kconfig | 1 -
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arch/mips/ath79/machtypes.h | 28 -----------------
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arch/mips/ath79/setup.c | 74 ++++++---------------------------------------
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3 files changed, 10 insertions(+), 93 deletions(-)
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delete mode 100644 arch/mips/ath79/machtypes.h
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Index: linux-4.14.18/arch/mips/Kconfig
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===================================================================
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--- linux-4.14.18.orig/arch/mips/Kconfig
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+++ linux-4.14.18/arch/mips/Kconfig
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@@ -196,7 +196,6 @@ config ATH79
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select COMMON_CLK
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select CLKDEV_LOOKUP
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select IRQ_MIPS_CPU
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- select MIPS_MACHINE
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select SYS_HAS_CPU_MIPS32_R2
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select SYS_HAS_EARLY_PRINTK
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select SYS_SUPPORTS_32BIT_KERNEL
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Index: linux-4.14.18/arch/mips/ath79/machtypes.h
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===================================================================
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--- linux-4.14.18.orig/arch/mips/ath79/machtypes.h
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+++ /dev/null
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@@ -1,28 +0,0 @@
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-/*
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- * Atheros AR71XX/AR724X/AR913X machine type definitions
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- *
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- * Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
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- * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
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- *
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- * This program is free software; you can redistribute it and/or modify it
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- * under the terms of the GNU General Public License version 2 as published
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- * by the Free Software Foundation.
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- */
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-
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-#ifndef _ATH79_MACHTYPE_H
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-#define _ATH79_MACHTYPE_H
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-
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-#include <asm/mips_machine.h>
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-
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-enum ath79_mach_type {
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- ATH79_MACH_GENERIC_OF = -1, /* Device tree board */
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- ATH79_MACH_GENERIC = 0,
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- ATH79_MACH_AP121, /* Atheros AP121 reference board */
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- ATH79_MACH_AP136_010, /* Atheros AP136-010 reference board */
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- ATH79_MACH_AP81, /* Atheros AP81 reference board */
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- ATH79_MACH_DB120, /* Atheros DB120 reference board */
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- ATH79_MACH_PB44, /* Atheros PB44 reference board */
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- ATH79_MACH_UBNT_XM, /* Ubiquiti Networks XM board rev 1.0 */
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-};
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-
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-#endif /* _ATH79_MACHTYPE_H */
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Index: linux-4.14.18/arch/mips/ath79/setup.c
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===================================================================
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--- linux-4.14.18.orig/arch/mips/ath79/setup.c
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+++ linux-4.14.18/arch/mips/ath79/setup.c
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@@ -32,7 +32,6 @@
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#include <asm/mach-ath79/ath79.h>
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#include <asm/mach-ath79/ar71xx_regs.h>
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#include "common.h"
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-#include "machtypes.h"
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#define ATH79_SYS_TYPE_LEN 64
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@@ -235,25 +234,21 @@ void __init plat_mem_setup(void)
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else if (fw_passed_dtb)
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__dt_setup_arch((void *)KSEG0ADDR(fw_passed_dtb));
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- if (mips_machtype != ATH79_MACH_GENERIC_OF) {
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- ath79_reset_base = ioremap_nocache(AR71XX_RESET_BASE,
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- AR71XX_RESET_SIZE);
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- ath79_pll_base = ioremap_nocache(AR71XX_PLL_BASE,
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- AR71XX_PLL_SIZE);
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- ath79_detect_sys_type();
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- ath79_ddr_ctrl_init();
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+ ath79_reset_base = ioremap_nocache(AR71XX_RESET_BASE,
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+ AR71XX_RESET_SIZE);
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+ ath79_pll_base = ioremap_nocache(AR71XX_PLL_BASE,
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+ AR71XX_PLL_SIZE);
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+ ath79_detect_sys_type();
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+ ath79_ddr_ctrl_init();
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- detect_memory_region(0, ATH79_MEM_SIZE_MIN, ATH79_MEM_SIZE_MAX);
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-
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- /* OF machines should use the reset driver */
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- _machine_restart = ath79_restart;
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- }
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+ detect_memory_region(0, ATH79_MEM_SIZE_MIN, ATH79_MEM_SIZE_MAX);
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+ _machine_restart = ath79_restart;
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_machine_halt = ath79_halt;
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pm_power_off = ath79_halt;
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}
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-static void __init ath79_of_plat_time_init(void)
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+void __init plat_time_init(void)
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{
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struct device_node *np;
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struct clk *clk;
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@@ -283,62 +278,12 @@ static void __init ath79_of_plat_time_in
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clk_put(clk);
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}
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-void __init plat_time_init(void)
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-{
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- unsigned long cpu_clk_rate;
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- unsigned long ahb_clk_rate;
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- unsigned long ddr_clk_rate;
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- unsigned long ref_clk_rate;
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-
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- if (IS_ENABLED(CONFIG_OF) && mips_machtype == ATH79_MACH_GENERIC_OF) {
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- ath79_of_plat_time_init();
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- return;
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- }
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-
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- ath79_clocks_init();
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-
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- cpu_clk_rate = ath79_get_sys_clk_rate("cpu");
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- ahb_clk_rate = ath79_get_sys_clk_rate("ahb");
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- ddr_clk_rate = ath79_get_sys_clk_rate("ddr");
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- ref_clk_rate = ath79_get_sys_clk_rate("ref");
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-
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- pr_info("Clocks: CPU:%lu.%03luMHz, DDR:%lu.%03luMHz, AHB:%lu.%03luMHz, Ref:%lu.%03luMHz\n",
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- cpu_clk_rate / 1000000, (cpu_clk_rate / 1000) % 1000,
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- ddr_clk_rate / 1000000, (ddr_clk_rate / 1000) % 1000,
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- ahb_clk_rate / 1000000, (ahb_clk_rate / 1000) % 1000,
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- ref_clk_rate / 1000000, (ref_clk_rate / 1000) % 1000);
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-
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- mips_hpt_frequency = cpu_clk_rate / 2;
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-}
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-
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void __init arch_init_irq(void)
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{
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irqchip_init();
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}
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-static int __init ath79_setup(void)
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-{
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- if (mips_machtype == ATH79_MACH_GENERIC_OF)
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- return 0;
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-
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- mips_machine_setup();
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-
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- return 0;
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-}
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-
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-arch_initcall(ath79_setup);
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-
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void __init device_tree_init(void)
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{
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unflatten_and_copy_device_tree();
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}
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-
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-MIPS_MACHINE(ATH79_MACH_GENERIC,
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- "Generic",
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- "Generic AR71XX/AR724X/AR913X based board",
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- NULL);
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-
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-MIPS_MACHINE(ATH79_MACH_GENERIC_OF,
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- "DTB",
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- "Generic AR71XX/AR724X/AR913X based board (DT)",
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- NULL);
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Index: linux-4.14.18/arch/mips/ath79/clock.c
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===================================================================
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--- linux-4.14.18.orig/arch/mips/ath79/clock.c
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+++ linux-4.14.18/arch/mips/ath79/clock.c
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@@ -26,7 +26,6 @@
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#include <asm/mach-ath79/ath79.h>
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#include <asm/mach-ath79/ar71xx_regs.h>
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#include "common.h"
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-#include "machtypes.h"
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#define AR71XX_BASE_FREQ 40000000
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#define AR724X_BASE_FREQ 40000000
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