openwrtv4/package/kernel/mac80211/patches/650-0017-rtl8xxxu-gen1-Add-module-parameters-to-adjust-DMA-ag.patch
Álvaro Fernández Rojas 092e77d948 rtl8xxxu: add support for rtl8188eu
Patches by Jes Sorensen:
https://git.kernel.org/cgit/linux/kernel/git/jes/linux.git/

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2016-09-15 20:23:46 +02:00

73 lines
2.8 KiB
Diff

From 3dc0c72274876ad9612b12ab9fce553ec7e21d20 Mon Sep 17 00:00:00 2001
From: Jes Sorensen <Jes.Sorensen@redhat.com>
Date: Wed, 22 Jun 2016 23:17:37 -0400
Subject: [PATCH] rtl8xxxu: gen1: Add module parameters to adjust DMA
aggregation parameters
This allows the user to specify DMA aggregation timout and block
count. Blocks are presumably always 512 bytes, so the minimum block
count is 6 for 802.11 packets.
Signed-off-by: Jes Sorensen <Jes.Sorensen@redhat.com>
---
.../net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c | 28 ++++++++++++++++++++++
1 file changed, 28 insertions(+)
--- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c
+++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c
@@ -45,6 +45,8 @@
int rtl8xxxu_debug = RTL8XXXU_DEBUG_EFUSE;
static bool rtl8xxxu_ht40_2g;
static bool rtl8xxxu_dma_aggregation;
+static int rtl8xxxu_dma_agg_timeout = -1;
+static int rtl8xxxu_dma_agg_pages = -1;
MODULE_AUTHOR("Jes Sorensen <Jes.Sorensen@redhat.com>");
MODULE_DESCRIPTION("RTL8XXXu USB mac80211 Wireless LAN Driver");
@@ -65,6 +67,10 @@ module_param_named(ht40_2g, rtl8xxxu_ht4
MODULE_PARM_DESC(ht40_2g, "Enable HT40 support on the 2.4GHz band");
module_param_named(dma_aggregation, rtl8xxxu_dma_aggregation, bool, 0600);
MODULE_PARM_DESC(dma_aggregation, "Enable DMA packet aggregation");
+module_param_named(dma_agg_timeout, rtl8xxxu_dma_agg_timeout, int, 0600);
+MODULE_PARM_DESC(dma_agg_timeout, "Set DMA aggregation timeout (range 1-127)");
+module_param_named(dma_agg_pages, rtl8xxxu_dma_agg_pages, int, 0600);
+MODULE_PARM_DESC(dma_agg_pages, "Set DMA aggregation pages (range 1-127, 0 to disable)");
#define USB_VENDOR_ID_REALTEK 0x0bda
#define RTL8XXXU_RX_URBS 32
@@ -4441,6 +4447,18 @@ void rtl8xxxu_gen1_init_aggregation(stru
*/
page_thresh = (priv->fops->rx_agg_buf_size / 512);
+ if (rtl8xxxu_dma_agg_pages >= 0) {
+ if (rtl8xxxu_dma_agg_pages <= page_thresh)
+ timeout = page_thresh;
+ else if (rtl8xxxu_dma_agg_pages <= 6)
+ dev_err(&priv->udev->dev,
+ "%s: dma_agg_pages=%i too small, minium is 6\n",
+ __func__, rtl8xxxu_dma_agg_pages);
+ else
+ dev_err(&priv->udev->dev,
+ "%s: dma_agg_pages=%i larger than limit %i\n",
+ __func__, rtl8xxxu_dma_agg_pages, page_thresh);
+ }
rtl8xxxu_write8(priv, REG_RXDMA_AGG_PG_TH, page_thresh);
/*
* REG_RXDMA_AGG_PG_TH + 1 seems to be the timeout register on
@@ -4448,6 +4466,16 @@ void rtl8xxxu_gen1_init_aggregation(stru
* don't set it, so better set both.
*/
timeout = 4;
+
+ if (rtl8xxxu_dma_agg_timeout >= 0) {
+ if (rtl8xxxu_dma_agg_timeout <= 127)
+ timeout = rtl8xxxu_dma_agg_timeout;
+ else
+ dev_err(&priv->udev->dev,
+ "%s: Invalid dma_agg_timeout: %i\n",
+ __func__, rtl8xxxu_dma_agg_timeout);
+ }
+
rtl8xxxu_write8(priv, REG_RXDMA_AGG_PG_TH + 1, timeout);
rtl8xxxu_write8(priv, REG_USB_DMA_AGG_TO, timeout);
priv->rx_buf_aggregation = 1;