dabdd123c9
Uses upstream code to parse DT supported band/frequency information. Update existing .dts files to the new format and remove unnecessary overrides. Signed-off-by: Felix Fietkau <nbd@nbd.name>
149 lines
2.2 KiB
Text
149 lines
2.2 KiB
Text
/dts-v1/;
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#include "mt7620a.dtsi"
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#include <dt-bindings/input/input.h>
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/ {
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compatible = "ralink,mt7620a-soc";
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model = "Planex MZK-EX750NP";
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gpio-leds {
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compatible = "gpio-leds";
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power {
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label = "mzk-ex750np:red:power";
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gpios = <&gpio0 14 1>;
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};
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wifi {
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label = "mzk-ex750np:red:wifi";
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gpios = <&gpio3 0 1>;
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};
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wps {
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label = "mzk-ex750np:green:wps";
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gpios = <&gpio0 10 1>;
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};
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rep {
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label = "mzk-ex750np:blue:rep";
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gpios = <&gpio2 16 1>;
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};
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wifi1 {
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label = "mzk-ex750np:blue:wifi1";
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gpios = <&gpio2 19 1>;
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};
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wifi2 {
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label = "mzk-ex750np:blue:wifi2";
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gpios = <&gpio2 18 1>;
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};
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wifi3 {
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label = "mzk-ex750np:blue:wifi3";
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gpios = <&gpio2 17 1>;
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};
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};
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gpio-keys-polled {
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compatible = "gpio-keys-polled";
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#address-cells = <1>;
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#size-cells = <0>;
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poll-interval = <20>;
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reset {
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label = "reset";
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gpios = <&gpio0 9 1>;
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linux,code = <KEY_RESTART>;
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};
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wps {
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label = "wps";
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gpios = <&gpio0 13 0>;
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linux,code = <KEY_RFKILL>;
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};
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};
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};
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&gpio2 {
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status = "okay";
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};
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&gpio3 {
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status = "okay";
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};
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&spi0 {
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status = "okay";
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m25p80@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "jedec,spi-nor";
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reg = <0>;
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linux,modalias = "m25p80", "w25q64";
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spi-max-frequency = <10000000>;
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partition@0 {
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label = "u-boot";
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reg = <0x0 0x30000>;
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read-only;
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};
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partition@30000 {
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label = "u-boot-env";
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reg = <0x30000 0x10000>;
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read-only;
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};
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factory: partition@40000 {
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label = "factory";
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reg = <0x40000 0x10000>;
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read-only;
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};
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partition@50000 {
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label = "firmware";
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reg = <0x50000 0x730000>;
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};
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partition@780000 {
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label = "Udata";
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reg = <0x780000 0x80000>;
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};
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};
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};
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&pinctrl {
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state_default: pinctrl0 {
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gpio {
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ralink,group = "uartf", "nd_sd", "rgmii2", "wled";
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ralink,function = "gpio";
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};
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};
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};
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ðernet {
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pinctrl-names = "default";
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pinctrl-0 = <&ephy_pins>;
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mtd-mac-address = <&factory 0x4>;
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mediatek,portmap = "llllw";
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};
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&wmac {
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ralink,mtd-eeprom = <&factory 0>;
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};
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&pcie {
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status = "okay";
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pcie-bridge {
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mt76@0,0 {
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reg = <0x0000 0 0 0 0>;
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device_type = "pci";
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mediatek,mtd-eeprom = <&factory 0x8000>;
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};
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};
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};
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