openwrtv4/target/linux/ramips/dts/MT7620a.dts
John Crispin 41f62983d3 ramips: dts file cleanup
cleanup some inconsistencies in the dts files

Signed-off-by: John Crispin <blogic@openwrt.org>

SVN-Revision: 37783
2013-08-14 19:08:44 +00:00

119 lines
1.9 KiB
Text

/dts-v1/;
/include/ "mt7620a.dtsi"
/ {
compatible = "ralink,mt7620a-eval-board", "ralink,mt7620a-soc";
model = "Ralink MT7620a + MT7610e evaluation board";
palmbus@10000000 {
sysc@0 {
ralink,pinmux = "spi", "uartlite", "mdio", "wled", "ephy", "rgmii1", "rgmii2";
ralink,gpiomux = "i2c", "jtag";
ralink,uartmux = "gpio";
ralink,wdtmux = <1>;
};
gpio0: gpio@600 {
status = "okay";
};
spi@b00 {
status = "okay";
m25p80@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "en25q64";
reg = <0 0>;
linux,modalias = "m25p80", "en25q64";
spi-max-frequency = <10000000>;
partition@0 {
label = "u-boot";
reg = <0x0 0x30000>;
read-only;
};
partition@30000 {
label = "u-boot-env";
reg = <0x30000 0x10000>;
read-only;
};
factory: partition@40000 {
label = "factory";
reg = <0x40000 0x10000>;
read-only;
};
partition@50000 {
label = "firmware";
reg = <0x50000 0x7b0000>;
};
};
};
};
ethernet@10100000 {
status = "okay";
port@4 {
compatible = "ralink,mt7620a-gsw-port", "ralink,eth-port";
reg = <4>;
phy-mode = "rgmii";
phy-handle = <&phy4>;
};
port@5 {
compatible = "ralink,mt7620a-gsw-port", "ralink,eth-port";
reg = <5>;
phy-mode = "rgmii";
phy-handle = <&phy5>;
};
mdio-bus {
status = "okay";
phy4: ethernet-phy@4 {
reg = <4>;
phy-mode = "rgmii";
};
phy5: ethernet-phy@5 {
reg = <5>;
phy-mode = "rgmii";
};
};
};
gsw@10110000 {
status = "okay";
ralink,port4 = "gmac";
};
sdhci@10130000 {
status = "okay";
};
pcie@10140000 {
status = "okay";
};
gpio-keys-polled {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
poll-interval = <20>;
s2 {
label = "S2";
gpios = <&gpio0 1 1>;
linux,code = <0x100>;
};
s3 {
label = "S3";
gpios = <&gpio0 2 1>;
linux,code = <0x101>;
};
};
};