6801c4e33e
The top half of UARTF on the HLK-RM04 is used for GPIO. mode 1 mode 2 RIN GPIO14 DSR_N GPIO13 DCD_N GPIO12 DTR_N GPIO11 RXD GPIO10 CTS_N GPIO09 TXD GPIO08 RTS_N GPIO07 This patch applies 3'b101 mode to UARTF: GPIO14 GPIO13 GPIO12 GPIO11 RXD CTS_N TXD RTS_N Because the base rt5350.dtsi file forces 3'b000 mode, remove the pin setting from this file and apply it directly to the files that inherit from it (WIZFI630A.dts and WT1520.dtsi). This change makes the rt5350.dtsi file consistent with the mt7620a.dtsi file. Signed-off-by: John Clark <inindev@gmail.com> SVN-Revision: 48665
182 lines
2.9 KiB
Text
182 lines
2.9 KiB
Text
/dts-v1/;
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/include/ "rt5350.dtsi"
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/ {
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compatible = "wizfi630a", "ralink,rt5350-soc";
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model = "WIZnet WizFi630A";
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chosen {
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bootargs = "console=ttyS1,115200";
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};
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palmbus@10000000 {
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gpio1: gpio@660 {
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status = "okay";
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};
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spi@b00 {
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status = "okay";
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m25p80@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "jedec,spi-nor";
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reg = <0>;
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linux,modalias = "m25p80", "w25q128";
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spi-max-frequency = <10000000>;
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partition@0 {
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label = "uboot";
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reg = <0x0 0x30000>;
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read-only;
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};
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partition@30000 {
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label = "uboot-env";
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reg = <0x30000 0x10000>;
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read-only;
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};
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factory: partition@40000 {
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label = "factory";
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reg = <0x40000 0x10000>;
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read-only;
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};
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partition@50000 {
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label = "firmware";
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reg = <0x50000 0xfb0000>;
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};
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};
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};
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uart@500 {
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compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a";
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reg = <0x500 0x100>;
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resets = <&rstctrl 12>;
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reset-names = "uart";
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interrupt-parent = <&intc>;
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interrupts = <5>;
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reg-shift = <2>;
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pinctrl-names = "default";
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pinctrl-0 = <&uartf_pins>;
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status = "okay";
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};
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uartlite@c00 {
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compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a";
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reg = <0xc00 0x100>;
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resets = <&rstctrl 19>;
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reset-names = "uartl";
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interrupt-parent = <&intc>;
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interrupts = <12>;
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reg-shift = <2>;
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pinctrl-names = "default";
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pinctrl-0 = <&uartlite_pins>;
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};
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};
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pinctrl {
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state_default: pinctrl0 {
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gpio {
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ralink,group = "i2c", "jtag" ;
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ralink,function = "gpio";
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};
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};
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uartf_gpio_pins: uartf_gpio {
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uartf_gpio {
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ralink,group = "uartf";
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ralink,function = "uartf";
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};
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};
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uartlite_pins: uartlite {
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uart {
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ralink,group = "uartlite";
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ralink,function = "uartlite";
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};
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};
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};
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ethernet@10100000 {
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mtd-mac-address = <&factory 0x4>;
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};
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esw@10110000 {
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mediatek,portmap = <0x17>;
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};
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wmac@10180000 {
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ralink,mtd-eeprom = <&factory 0>;
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};
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ehci@101c0000 {
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status = "okay";
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};
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ohci@101c1000 {
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status = "okay";
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};
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gpio-export {
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compatible = "gpio-export";
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#size-cells = <0>;
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};
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gpio-leds {
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compatible = "gpio-leds";
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run {
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label = "wizfi630a::run";
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gpios = <&gpio0 1 1>;
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};
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wps {
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label = "wizfi630a::wps";
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gpios = <&gpio0 20 1>;
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};
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uart1 {
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label = "wizfi630a::uart1";
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gpios = <&gpio0 18 1>;
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};
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uart2 {
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label = "wizfi630a::uart2";
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gpios = <&gpio0 21 1>;
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};
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};
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gpio-keys-polled {
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compatible = "gpio-keys-polled";
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#address-cells = <1>;
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#size-cells = <0>;
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poll-interval = <20>;
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reset {
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label = "reset";
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gpios = <&gpio0 17 1>;
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linux,code = <0x198>;
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};
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wps {
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label = "wps";
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gpios = <&gpio0 0 1>;
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linux,code = <0x211>;
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};
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scm1 {
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label = "SCM1";
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gpios = <&gpio0 19 1>;
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linux,code = <0x100>;
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};
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scm2 {
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label = "SCM2";
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gpios = <&gpio0 2 1>;
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linux,code = <0x101>;
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};
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};
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};
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