6b775f4517
This change cherry-picks the following 3 changes from linux-next: *fb7737 hwspinlock/core: add device tree support *19a0f6 hwspinlock: qcom: Add support for Qualcomm HW Mutex block *bd5717 hwspinlock: qcom: Correct msb in regmap_field We're also adding a patch to add the hardware spinlock device nodes on IPQ806x platforms (033-soc-qcom-Add-sfbp-device-to-IPQ806x-dts.patch). Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org> SVN-Revision: 46655
51 lines
1.4 KiB
Diff
51 lines
1.4 KiB
Diff
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Subject: [v3,4/5] arm: qcom: dts: Add NAND controller node for ipq806x
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From: Archit Taneja <architt@codeaurora.org>
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X-Patchwork-Id: 6927121
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Message-Id: <1438578498-32254-5-git-send-email-architt@codeaurora.org>
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To: linux-mtd@lists.infradead.org, dehrenberg@google.com,
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cernekee@gmail.com, computersforpeace@gmail.com
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Cc: linux-arm-msm@vger.kernel.org, agross@codeaurora.org,
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sboyd@codeaurora.org, linux-kernel@vger.kernel.org,
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Archit Taneja <architt@codeaurora.org>, devicetree@vger.kernel.org
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Date: Mon, 3 Aug 2015 10:38:17 +0530
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The nand controller in IPQ806x is of the 'EBI2 type'. Use the corresponding
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compatible string.
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Cc: devicetree@vger.kernel.org
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Reviewed-by: Andy Gross <agross@codeaurora.org>
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Signed-off-by: Archit Taneja <architt@codeaurora.org>
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---
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arch/arm/boot/dts/qcom-ipq8064.dtsi | 15 +++++++++++++++
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1 file changed, 15 insertions(+)
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--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
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+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
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@@ -620,6 +620,22 @@
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status = "disabled";
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};
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+
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+ nand@1ac00000 {
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+ compatible = "qcom,ebi2-nandc";
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+ reg = <0x1ac00000 0x800>;
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+
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+ clocks = <&gcc EBI2_CLK>,
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+ <&gcc EBI2_AON_CLK>;
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+ clock-names = "core", "aon";
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+
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+ dmas = <&adm_dma 3>;
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+ dma-names = "rxtx";
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+ qcom,cmd-crci = <15>;
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+ qcom,data-crci = <3>;
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+
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+ status = "disabled";
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+ };
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};
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sfpb_mutex: sfpb-mutex {
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