204 lines
6 KiB
Diff
204 lines
6 KiB
Diff
From 8aa49d107d8a22fd6cbf37174614baf32d0976e2 Mon Sep 17 00:00:00 2001
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From: Shunli Wang <shunli.wang@mediatek.com>
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Date: Wed, 30 Dec 2015 14:41:46 +0800
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Subject: [PATCH 005/102] soc: mediatek: Add MT2701/MT7623 scpsys driver
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Add scpsys driver for MT2701 and MT7623.
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Signed-off-by: Shunli Wang <shunli.wang@mediatek.com>
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Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
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---
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drivers/soc/mediatek/Kconfig | 11 ++
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drivers/soc/mediatek/Makefile | 1 +
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drivers/soc/mediatek/mtk-scpsys-mt2701.c | 161 ++++++++++++++++++++++++++++++
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3 files changed, 173 insertions(+)
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create mode 100644 drivers/soc/mediatek/mtk-scpsys-mt2701.c
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--- a/drivers/soc/mediatek/Kconfig
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+++ b/drivers/soc/mediatek/Kconfig
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@@ -39,3 +39,14 @@ config MTK_SCPSYS_MT8173
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driver.
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The System Control Processor System (SCPSYS) has several power
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management related tasks in the system.
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+
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+config MTK_SCPSYS_MT2701
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+ bool "SCPSYS Support MediaTek MT2701 and MT7623"
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+ depends on ARCH_MEDIATEK || COMPILE_TEST
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+ select MTK_SCPSYS
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+ default ARCH_MEDIATEK
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+ help
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+ Say yes here to add support for the MT2701/MT7623 SCPSYS power
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+ domain driver.
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+ The System Control Processor System (SCPSYS) has several power
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+ management related tasks in the system.
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--- a/drivers/soc/mediatek/Makefile
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+++ b/drivers/soc/mediatek/Makefile
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@@ -2,3 +2,4 @@ obj-$(CONFIG_MTK_INFRACFG) += mtk-infrac
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obj-$(CONFIG_MTK_PMIC_WRAP) += mtk-pmic-wrap.o
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obj-$(CONFIG_MTK_SCPSYS) += mtk-scpsys.o
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obj-$(CONFIG_MTK_SCPSYS_MT8173) += mtk-scpsys-mt8173.o
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+obj-$(CONFIG_MTK_SCPSYS_MT2701) += mtk-scpsys-mt2701.o
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--- /dev/null
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+++ b/drivers/soc/mediatek/mtk-scpsys-mt2701.c
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@@ -0,0 +1,161 @@
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+/*
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+ * Copyright (c) 2015 Mediatek, Shunli Wang <shunli.wang@mediatek.com>
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+ *
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+ * This program is free software; you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License version 2 as
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+ * published by the Free Software Foundation.
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+ *
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+ * This program is distributed in the hope that it will be useful,
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+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+ * GNU General Public License for more details.
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+ */
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+#include <linux/mfd/syscon.h>
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+#include <linux/module.h>
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+#include <linux/of_device.h>
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+#include <linux/pm_domain.h>
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+#include <linux/soc/mediatek/infracfg.h>
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+#include <dt-bindings/power/mt2701-power.h>
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+
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+#include "mtk-scpsys.h"
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+
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+#define SPM_VDE_PWR_CON 0x0210
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+#define SPM_MFG_PWR_CON 0x0214
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+#define SPM_ISP_PWR_CON 0x0238
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+#define SPM_DIS_PWR_CON 0x023C
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+#define SPM_CONN_PWR_CON 0x0280
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+#define SPM_BDP_PWR_CON 0x029C
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+#define SPM_ETH_PWR_CON 0x02A0
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+#define SPM_HIF_PWR_CON 0x02A4
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+#define SPM_IFR_MSC_PWR_CON 0x02A8
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+#define SPM_PWR_STATUS 0x060c
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+#define SPM_PWR_STATUS_2ND 0x0610
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+
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+#define CONN_PWR_STA_MASK BIT(1)
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+#define DIS_PWR_STA_MASK BIT(3)
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+#define MFG_PWR_STA_MASK BIT(4)
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+#define ISP_PWR_STA_MASK BIT(5)
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+#define VDE_PWR_STA_MASK BIT(7)
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+#define BDP_PWR_STA_MASK BIT(14)
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+#define ETH_PWR_STA_MASK BIT(15)
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+#define HIF_PWR_STA_MASK BIT(16)
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+#define IFR_MSC_PWR_STA_MASK BIT(17)
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+
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+#define MT2701_TOP_AXI_PROT_EN_CONN 0x0104
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+#define MT2701_TOP_AXI_PROT_EN_DISP 0x0002
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+
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+static const struct scp_domain_data scp_domain_data[] = {
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+ [MT2701_POWER_DOMAIN_CONN] = {
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+ .name = "conn",
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+ .sta_mask = CONN_PWR_STA_MASK,
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+ .ctl_offs = SPM_CONN_PWR_CON,
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+ .bus_prot_mask = MT2701_TOP_AXI_PROT_EN_CONN,
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+ .active_wakeup = true,
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+ },
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+ [MT2701_POWER_DOMAIN_DISP] = {
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+ .name = "disp",
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+ .sta_mask = DIS_PWR_STA_MASK,
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+ .ctl_offs = SPM_DIS_PWR_CON,
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+ .sram_pdn_bits = GENMASK(11, 8),
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+ .clk_id = {CLK_MM},
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+ .bus_prot_mask = MT2701_TOP_AXI_PROT_EN_DISP,
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+ .active_wakeup = true,
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+ },
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+ [MT2701_POWER_DOMAIN_MFG] = {
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+ .name = "mfg",
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+ .sta_mask = MFG_PWR_STA_MASK,
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+ .ctl_offs = SPM_MFG_PWR_CON,
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+ .sram_pdn_bits = GENMASK(11, 8),
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+ .sram_pdn_ack_bits = GENMASK(12, 12),
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+ .active_wakeup = true,
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+ },
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+ [MT2701_POWER_DOMAIN_VDEC] = {
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+ .name = "vdec",
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+ .sta_mask = VDE_PWR_STA_MASK,
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+ .ctl_offs = SPM_VDE_PWR_CON,
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+ .sram_pdn_bits = GENMASK(11, 8),
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+ .sram_pdn_ack_bits = GENMASK(12, 12),
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+ .clk_id = {CLK_MM},
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+ .active_wakeup = true,
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+ },
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+ [MT2701_POWER_DOMAIN_ISP] = {
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+ .name = "isp",
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+ .sta_mask = ISP_PWR_STA_MASK,
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+ .ctl_offs = SPM_ISP_PWR_CON,
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+ .sram_pdn_bits = GENMASK(11, 8),
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+ .sram_pdn_ack_bits = GENMASK(13, 12),
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+ .active_wakeup = true,
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+ },
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+ [MT2701_POWER_DOMAIN_BDP] = {
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+ .name = "bdp",
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+ .sta_mask = BDP_PWR_STA_MASK,
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+ .ctl_offs = SPM_BDP_PWR_CON,
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+ .sram_pdn_bits = GENMASK(11, 8),
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+ .active_wakeup = true,
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+ },
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+ [MT2701_POWER_DOMAIN_ETH] = {
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+ .name = "eth",
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+ .sta_mask = ETH_PWR_STA_MASK,
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+ .ctl_offs = SPM_ETH_PWR_CON,
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+ .sram_pdn_bits = GENMASK(11, 8),
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+ .sram_pdn_ack_bits = GENMASK(15, 12),
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+ .active_wakeup = true,
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+ },
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+ [MT2701_POWER_DOMAIN_HIF] = {
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+ .name = "hif",
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+ .sta_mask = HIF_PWR_STA_MASK,
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+ .ctl_offs = SPM_HIF_PWR_CON,
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+ .sram_pdn_bits = GENMASK(11, 8),
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+ .sram_pdn_ack_bits = GENMASK(15, 12),
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+ .active_wakeup = true,
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+ },
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+ [MT2701_POWER_DOMAIN_IFR_MSC] = {
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+ .name = "ifr_msc",
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+ .sta_mask = IFR_MSC_PWR_STA_MASK,
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+ .ctl_offs = SPM_IFR_MSC_PWR_CON,
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+ .active_wakeup = true,
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+ },
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+};
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+
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+#define NUM_DOMAINS ARRAY_SIZE(scp_domain_data)
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+
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+static int __init scpsys_probe(struct platform_device *pdev)
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+{
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+ struct scp *scp;
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+
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+ scp = init_scp(pdev, scp_domain_data, NUM_DOMAINS);
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+ if (IS_ERR(scp))
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+ return PTR_ERR(scp);
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+
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+ mtk_register_power_domains(pdev, scp, NUM_DOMAINS);
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+
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+ return 0;
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+}
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+
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+static const struct of_device_id of_scpsys_match_tbl[] = {
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+ {
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+ .compatible = "mediatek,mt2701-scpsys",
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+ }, {
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+ /* sentinel */
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+ }
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+};
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+MODULE_DEVICE_TABLE(of, of_scpsys_match_tbl);
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+
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+static struct platform_driver scpsys_drv = {
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+ .driver = {
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+ .name = "mtk-scpsys-mt2701",
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+ .owner = THIS_MODULE,
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+ .of_match_table = of_match_ptr(of_scpsys_match_tbl),
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+ },
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+ .probe = scpsys_probe,
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+};
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+
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+static int __init scpsys_init(void)
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+{
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+ return platform_driver_register(&scpsys_drv);
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+}
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+
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+subsys_initcall(scpsys_init);
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+
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+MODULE_DESCRIPTION("MediaTek MT2701 scpsys driver");
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+MODULE_LICENSE("GPL v2");
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