487 lines
12 KiB
C
487 lines
12 KiB
C
/* CF-mips driver
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This is a block driver for the direct (mmaped) interface to the CF-slot,
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found in Routerboard.com's RB532 board
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See SDK provided from routerboard.com.
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Module adapted By P.Christeas <p_christeas@yahoo.com>, 2005-6.
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Cleaned up and adapted to platform_device by Felix Fietkau <nbd@openwrt.org>
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This work is redistributed under the terms of the GNU General Public License.
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*/
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#include <linux/kernel.h> /* printk() */
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#include <linux/module.h> /* module to be loadable */
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#include <linux/delay.h>
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#include <linux/sched.h>
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#include <linux/pci.h>
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#include <linux/ioport.h> /* request_mem_region() */
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#include <asm/gpio.h>
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#include <asm/unaligned.h> /* ioremap() */
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#include <asm/io.h> /* ioremap() */
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#include <asm/rc32434/rb.h>
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#include "ata.h"
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#define REQUEST_MEM_REGION 0
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#define DEBUG 1
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#if DEBUG
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#define DEBUGP printk
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#else
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#define DEBUGP(format, args...)
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#endif
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#define SECS 1000000 /* unit for wait_not_busy() is 1us */
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unsigned cf_head = 0;
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unsigned cf_cyl = 0;
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unsigned cf_spt = 0;
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unsigned cf_sectors = 0;
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static unsigned cf_block_size = 1;
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static void *baddr = 0;
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#define DBUF32 ((volatile u32 *)((unsigned long)dev->baddr | ATA_DBUF_OFFSET))
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static void cf_do_tasklet(unsigned long dev_l);
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static inline void wareg(u8 val, unsigned reg, struct cf_mips_dev* dev)
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{
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writeb(val, dev->baddr + ATA_REG_OFFSET + reg);
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}
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static inline u8 rareg(unsigned reg, struct cf_mips_dev* dev)
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{
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return readb(dev->baddr + ATA_REG_OFFSET + reg);
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}
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static inline int cfrdy(struct cf_mips_dev *dev)
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{
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return gpio_get_value(dev->pin);
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}
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static inline void prepare_cf_irq(struct cf_mips_dev *dev)
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{
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rb500_gpio_set_int_level(1, dev->pin); /* interrupt on cf ready (not busy) */
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rb500_gpio_set_int_status(0, dev->pin); /* clear interrupt status */
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}
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static inline int cf_present(struct cf_mips_dev* dev)
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{
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/* TODO: read and configure CIS into memory mapped mode
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* TODO: parse CISTPL_CONFIG on CF+ cards to get base address (0x200)
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* TODO: maybe adjust power saving setting for Hitachi Microdrive
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*/
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int i;
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/* setup CFRDY GPIO as input */
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rb500_gpio_set_func(dev->pin, 0);
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gpio_direction_input(dev->pin);
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for (i = 0; i < 0x10; ++i) {
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if (rareg(i,dev) != 0xff)
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return 1;
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}
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return 0;
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}
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static inline int is_busy(struct cf_mips_dev *dev)
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{
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return !cfrdy(dev);
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}
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static int wait_not_busy(int to_us, int wait_for_busy,struct cf_mips_dev *dev)
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{
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int us_passed = 0;
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if (wait_for_busy && !is_busy(dev)) {
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/* busy must appear within 400ns,
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* but it may dissapear before we see it
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* => must not wait for busy in a loop
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*/
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ndelay(400);
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}
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do {
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if (us_passed)
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udelay(1); /* never reached in async mode */
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if (!is_busy(dev)) {
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if (us_passed > 1 * SECS) {
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printk(KERN_WARNING "cf-mips: not busy ok (after %dus)"
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", status 0x%02x\n", us_passed, (unsigned) rareg(ATA_REG_ST,dev));
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}
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return CF_TRANS_OK;
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}
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if (us_passed == 1 * SECS) {
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printk(KERN_WARNING "cf-mips: wait not busy %dus..\n", to_us);
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}
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if (dev->async_mode) {
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dev->to_timer.expires = jiffies + (to_us * HZ / SECS);
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dev->irq_enable_time = jiffies;
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prepare_cf_irq(dev);
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if (is_busy(dev)) {
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add_timer(&dev->to_timer);
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enable_irq(dev->irq);
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return CF_TRANS_IN_PROGRESS;
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}
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continue;
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}
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++us_passed;
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} while (us_passed < to_us);
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printk(KERN_ERR "cf-mips: wait not busy timeout (%dus)"
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", status 0x%02x, state %d\n",
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to_us, (unsigned) rareg(ATA_REG_ST,dev), dev->tstate);
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return CF_TRANS_FAILED;
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}
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static irqreturn_t cf_irq_handler(int irq, void *dev_id)
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{
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/* While tasklet has not disabled irq, irq will be retried all the time
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* because of ILEVEL matching GPIO pin status => deadlock.
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* To avoid this, we change ILEVEL to 0.
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*/
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struct cf_mips_dev *dev=dev_id;
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rb500_gpio_set_int_level(0, dev->pin);
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rb500_gpio_set_int_status(0, dev->pin);
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del_timer(&dev->to_timer);
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tasklet_schedule(&dev->tasklet);
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return IRQ_HANDLED;
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}
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static int do_reset(struct cf_mips_dev *dev)
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{
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printk(KERN_INFO "cf-mips: resetting..\n");
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wareg(ATA_REG_DC_SRST, ATA_REG_DC,dev);
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udelay(1); /* FIXME: how long should we wait here? */
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wareg(0, ATA_REG_DC,dev);
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return wait_not_busy(30 * SECS, 1,dev);
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}
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static int set_multiple(struct cf_mips_dev *dev)
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{
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if (dev->block_size <= 1)
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return CF_TRANS_OK;
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wareg(dev->block_size, ATA_REG_SC,dev);
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wareg(ATA_REG_DH_BASE | ATA_REG_DH_LBA, ATA_REG_DH,dev);
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wareg(ATA_CMD_SET_MULTIPLE, ATA_REG_CMD,dev);
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return wait_not_busy(10 * SECS, 1,dev);
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}
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static int set_cmd(struct cf_mips_dev *dev)
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{
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//DEBUGP(KERN_INFO "cf-mips: ata cmd 0x%02x\n", dev->tcmd);
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// sector_count should be <=24 bits..
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BUG_ON(dev->tsect_start>=0x10000000);
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// This way, it addresses 2^24 * 512 = 128G
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if (dev->tsector_count) {
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wareg(dev->tsector_count & 0xff, ATA_REG_SC,dev);
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wareg(dev->tsect_start & 0xff, ATA_REG_SN,dev);
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wareg((dev->tsect_start >> 8) & 0xff, ATA_REG_CL,dev);
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wareg((dev->tsect_start >> 16) & 0xff, ATA_REG_CH,dev);
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}
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wareg(((dev->tsect_start >> 24) & 0x0f) | ATA_REG_DH_BASE | ATA_REG_DH_LBA,
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ATA_REG_DH,dev); /* select drive on all commands */
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wareg(dev->tcmd, ATA_REG_CMD,dev);
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return wait_not_busy(10 * SECS, 1,dev);
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}
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static int do_trans(struct cf_mips_dev *dev)
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{
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int res;
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unsigned st;
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int transfered;
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//printk("do_trans: %d sectors left\n",dev->tsectors_left);
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while (dev->tsectors_left) {
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transfered = 0;
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st = rareg(ATA_REG_ST,dev);
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if (!(st & ATA_REG_ST_DRQ)) {
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printk(KERN_ERR "cf-mips: do_trans without DRQ (status 0x%x)!\n", st);
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if (st & ATA_REG_ST_ERR) {
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int errId = rareg(ATA_REG_ERR,dev);
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printk(KERN_ERR "cf-mips: %s error, status 0x%x, errid 0x%x\n",
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(dev->tread ? "read" : "write"), st, errId);
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}
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return CF_TRANS_FAILED;
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}
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do { /* Fill/read the buffer one block */
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u32 *qbuf, *qend;
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qbuf = (u32 *)dev->tbuf;
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qend = qbuf + CF_SECT_SIZE / sizeof(u32);
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if (dev->tread) {
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while (qbuf!=qend)
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put_unaligned(*DBUF32,qbuf++);
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//*(qbuf++) = *DBUF32;
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}
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else {
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while(qbuf!=qend)
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*DBUF32 = get_unaligned(qbuf++);
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}
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dev->tsectors_left--;
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dev->tbuf += CF_SECT_SIZE;
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dev->tbuf_size -= CF_SECT_SIZE;
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transfered++;
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} while (transfered != dev->block_size && dev->tsectors_left > 0);
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res = wait_not_busy(10 * SECS, 1,dev);
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if (res != CF_TRANS_OK)
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return res;
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};
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st = rareg(ATA_REG_ST,dev);
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if (st & (ATA_REG_ST_DRQ | ATA_REG_ST_DWF | ATA_REG_ST_ERR)) {
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if (st & ATA_REG_ST_DRQ) {
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printk(KERN_ERR "cf-mips: DRQ after all %d sectors are %s"
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", status 0x%x\n", dev->tsector_count, (dev->tread ? "read" : "written"), st);
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} else if (st & ATA_REG_ST_DWF) {
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printk(KERN_ERR "cf-mips: write fault, status 0x%x\n", st);
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} else {
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int errId = rareg(ATA_REG_ERR,dev);
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printk(KERN_ERR "cf-mips: %s error, status 0x%x, errid 0x%x\n",
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(dev->tread ? "read" : "write"), st, errId);
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}
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return CF_TRANS_FAILED;
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}
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return CF_TRANS_OK;
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}
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static int cf_do_state(struct cf_mips_dev *dev)
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{
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int res;
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switch (dev->tstate) { /* fall through everywhere */
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case TS_IDLE:
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dev->tstate = TS_READY;
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if (is_busy(dev)) {
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dev->tstate = TS_AFTER_RESET;
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res = do_reset(dev);
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if (res != CF_TRANS_OK)
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break;
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}
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case TS_AFTER_RESET:
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if (dev->tstate == TS_AFTER_RESET) {
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dev->tstate = TS_READY;
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res = set_multiple(dev);
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if (res != CF_TRANS_OK)
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break;
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}
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case TS_READY:
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dev->tstate = TS_CMD;
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res = set_cmd(dev);
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if (res != CF_TRANS_OK)
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break;;
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case TS_CMD:
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dev->tstate = TS_TRANS;
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case TS_TRANS:
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res = do_trans(dev);
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break;
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default:
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printk(KERN_ERR "cf-mips: BUG: unknown tstate %d\n", dev->tstate);
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return CF_TRANS_FAILED;
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}
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if (res != CF_TRANS_IN_PROGRESS)
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dev->tstate = TS_IDLE;
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return res;
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}
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static void cf_do_tasklet(unsigned long dev_l)
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{
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struct cf_mips_dev* dev=(struct cf_mips_dev*) dev_l;
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int res;
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disable_irq(dev->irq);
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if (dev->tstate == TS_IDLE)
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return; /* can happen when irq is first registered */
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#if 0
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DEBUGP(KERN_WARNING "cf-mips: not busy ok (tasklet) status 0x%02x\n",
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(unsigned) rareg(ATA_REG_ST,dev));
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#endif
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res = cf_do_state(dev);
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if (res == CF_TRANS_IN_PROGRESS)
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return;
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cf_async_trans_done(dev,res);
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}
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static void cf_async_timeout(unsigned long dev_l)
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{
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struct cf_mips_dev* dev=(struct cf_mips_dev*) dev_l;
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disable_irq(dev->irq);
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/* Perhaps send abort to the device? */
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printk(KERN_ERR "cf-mips: wait not busy timeout (%lus)"
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", status 0x%02x, state %d\n",
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jiffies - dev->irq_enable_time, (unsigned) rareg(ATA_REG_ST,dev), dev->tstate);
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dev->tstate = TS_IDLE;
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cf_async_trans_done(dev,CF_TRANS_FAILED);
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}
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int cf_do_transfer(struct cf_mips_dev* dev,sector_t sector, unsigned long nsect,
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char* buffer, int is_write)
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{
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BUG_ON(dev->tstate!=TS_IDLE);
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if (nsect > ATA_MAX_SECT_PER_CMD) {
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printk(KERN_WARNING "cf-mips: sector count %lu out of range\n",nsect);
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return CF_TRANS_FAILED;
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}
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if (sector + nsect > dev->sectors) {
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printk(KERN_WARNING "cf-mips: sector %lu out of range\n",sector);
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return CF_TRANS_FAILED;
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}
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dev->tbuf = buffer;
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dev->tbuf_size = nsect*512;
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dev->tsect_start = sector;
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dev->tsector_count = nsect;
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dev->tsectors_left = dev->tsector_count;
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dev->tread = (is_write)?0:1;
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dev->tcmd = (dev->block_size == 1 ?
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(is_write ? ATA_CMD_WRITE_SECTORS : ATA_CMD_READ_SECTORS) :
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(is_write ? ATA_CMD_WRITE_MULTIPLE : ATA_CMD_READ_MULTIPLE));
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return cf_do_state(dev);
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}
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static int do_identify(struct cf_mips_dev *dev)
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{
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u16 sbuf[CF_SECT_SIZE >> 1];
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int res;
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char tstr[17]; //serial
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char tmp;
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int i;
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BUG_ON(dev->tstate!=TS_IDLE);
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dev->tbuf = (char *) sbuf;
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dev->tbuf_size = CF_SECT_SIZE;
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dev->tsect_start = 0;
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dev->tsector_count = 0;
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dev->tsectors_left = 1;
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dev->tread = 1;
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dev->tcmd = ATA_CMD_IDENTIFY_DRIVE;
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DEBUGP(KERN_INFO "cf-mips: identify drive..\n");
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res = cf_do_state(dev);
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if (res == CF_TRANS_IN_PROGRESS) {
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printk(KERN_ERR "cf-mips: BUG: async identify cmd\n");
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return CF_TRANS_FAILED;
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}
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if (res != CF_TRANS_OK)
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return 0;
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dev->head = sbuf[3];
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dev->cyl = sbuf[1];
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dev->spt = sbuf[6];
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dev->sectors = ((unsigned long) sbuf[7] << 16) | sbuf[8];
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dev->dtype=sbuf[0];
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memcpy(tstr, &sbuf[12], 16);
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tstr[16] = '\0';
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/* Byte-swap the serial number */
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for (i = 0; i<8; i++) {
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tmp = tstr[i * 2];
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tstr[i * 2] = tstr[i * 2 +1];
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tstr[i * 2 + 1] = tmp;
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}
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printk(KERN_INFO "cf-mips: %s detected, C/H/S=%d/%d/%d sectors=%u (%uMB) Serial=%s\n",
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(sbuf[0] == 0x848A ? "CF card" : "ATA drive"), dev->cyl, dev->head,
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dev->spt, dev->sectors, dev->sectors >> 11, tstr);
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return 1;
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}
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static void init_multiple(struct cf_mips_dev * dev)
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{
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int res;
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DEBUGP(KERN_INFO "cf-mips: detecting block size\n");
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dev->block_size = 128; /* max block size = 128 sectors (64KB) */
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do {
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wareg(dev->block_size, ATA_REG_SC,dev);
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wareg(ATA_REG_DH_BASE | ATA_REG_DH_LBA, ATA_REG_DH,dev);
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wareg(ATA_CMD_SET_MULTIPLE, ATA_REG_CMD,dev);
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res = wait_not_busy(10 * SECS, 1,dev);
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if (res != CF_TRANS_OK) {
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printk(KERN_ERR "cf-mips: failed to detect block size: busy!\n");
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dev->block_size = 1;
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return;
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}
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if ((rareg(ATA_REG_ST,dev) & ATA_REG_ST_ERR) == 0)
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break;
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dev->block_size /= 2;
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} while (dev->block_size > 1);
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printk(KERN_INFO "cf-mips: multiple sectors = %d\n", dev->block_size);
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}
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int cf_init(struct cf_mips_dev *dev)
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{
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tasklet_init(&dev->tasklet,cf_do_tasklet,(unsigned long)dev);
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dev->baddr = ioremap_nocache((unsigned long)dev->base, CFDEV_BUF_SIZE);
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if (!dev->baddr) {
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printk(KERN_ERR "cf-mips: cf_init: ioremap for (%lx,%x) failed\n",
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(unsigned long) dev->base, CFDEV_BUF_SIZE);
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return -EBUSY;
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}
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if (!cf_present(dev)) {
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printk(KERN_WARNING "cf-mips: cf card not present\n");
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iounmap(dev->baddr);
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return -ENODEV;
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}
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if (do_reset(dev) != CF_TRANS_OK) {
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printk(KERN_ERR "cf-mips: cf reset failed\n");
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iounmap(dev->baddr);
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return -EBUSY;
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}
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if (!do_identify(dev)) {
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printk(KERN_ERR "cf-mips: cf identify failed\n");
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iounmap(dev->baddr);
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return -EBUSY;
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}
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/* set_apm_level(ATA_APM_WITH_STANDBY); */
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init_multiple(dev);
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init_timer(&dev->to_timer);
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dev->to_timer.function = cf_async_timeout;
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dev->to_timer.data = (unsigned long)dev;
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prepare_cf_irq(dev);
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if (request_irq(dev->irq, cf_irq_handler, 0, "CF Mips", dev)) {
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printk(KERN_ERR "cf-mips: failed to get irq\n");
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iounmap(dev->baddr);
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return -EBUSY;
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}
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/* Disable below would be odd, because request will enable, and the tasklet
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will disable it itself */
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//disable_irq(dev->irq);
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dev->async_mode = 1;
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return 0;
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}
|
|
|
|
void cf_cleanup(struct cf_mips_dev *dev)
|
|
{
|
|
iounmap(dev->baddr);
|
|
free_irq(dev->irq, NULL);
|
|
#if REQUEST_MEM_REGION
|
|
release_mem_region((unsigned long)dev->base, CFDEV_BUF_SIZE);
|
|
#endif
|
|
}
|
|
|
|
|
|
/*eof*/
|