15a14cf166
The QorIQ LS1012A processor, optimized for battery-backed or USB-powered, integrates a single ARM Cortex-A53 core with a hardware packet forwarding engine and high-speed interfaces to deliver line-rate networking performance. QorIQ LS1012A Reference Design System (LS1012ARDB) is a high-performance development platform, with a complete debugging environment. The LS1012ARDB board supports the QorIQ LS1012A processor and is optimized to support the high-bandwidth DDR3L memory and a full complement of high-speed SerDes ports. LEDE/OPENWRT will auto strip executable program file while make. So we need select CONFIG_NO_STRIP=y while make menuconfig to avoid the ppfe network fiemware be destroyed, then run make to build ls1012ardb firmware. The fsl-quadspi flash with jffs2 fs is unstable and arise some failed message. This issue have noticed the IP owner for investigate, hope he can solve it earlier. So the ls1012ardb now also provide a xx-firmware.ext4.bin as default firmware, and the uboot bootcmd will run wrtboot_ext4rfs for "rootfstype=ext4" bootargs. Signed-off-by: Yutang Jiang <yutang.jiang@nxp.com>
31 lines
1 KiB
Diff
31 lines
1 KiB
Diff
From 035fe1e511e053c6650f37626deb5da76dcc1d92 Mon Sep 17 00:00:00 2001
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From: Ying Zhang <ying.zhang22455@nxp.com>
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Date: Thu, 29 Sep 2016 11:29:48 +0800
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Subject: [PATCH 119/124] armv8: aarch32: defconfig: Enable CAAM support
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This patch is to enable the driver module for Freescale's Cryptographics
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Accelerator and Assurance Module (CAAM) and related options.
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Signed-off-by: Alison Wang <alison.wang@nxp.com>
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---
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arch/arm/configs/ls_aarch32_defconfig | 9 +++++++--
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1 file changed, 7 insertions(+), 2 deletions(-)
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--- a/arch/arm/configs/ls_aarch32_defconfig
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+++ b/arch/arm/configs/ls_aarch32_defconfig
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@@ -200,8 +200,13 @@ CONFIG_MAGIC_SYSRQ=y
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# CONFIG_FTRACE is not set
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CONFIG_PID_IN_CONTEXTIDR=y
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CONFIG_CRYPTO_LZO=y
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-# CONFIG_CRYPTO_ANSI_CPRNG is not set
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-# CONFIG_CRYPTO_HW is not set
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+CONFIG_CRYPTO_ANSI_CPRNG=y
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+CONFIG_CRYPTO_DEV_FSL_CAAM=y
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+CONFIG_ARM_CRYPTO=y
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+CONFIG_CRYPTO_SHA1_ARM_NEON=y
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+CONFIG_CRYPTO_SHA256_ARM=y
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+CONFIG_CRYPTO_SHA512_ARM_NEON=y
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+CONFIG_CRYPTO_AES_ARM_BS=y
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CONFIG_CRC_CCITT=m
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CONFIG_CRC_T10DIF=y
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CONFIG_CRC7=m
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