6eaf8b3d89
Updated the devicetree source files to make use of the following upstreamed drivers: - xrx200 ethernet phy - reset controller unit - dwc2 - fpi Use our custom xrx200 ethernet phy compatible to support boards, which have switched the vr9 revision during lifetime, with a single devicetree source file. By switching to the dwc2 driver + usb phy framework, we don't need to used our custom gpio power patch and can use a fixed regulator instead. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Signed-off-by: Mathias Kresin <dev@kresin.me>
312 lines
6 KiB
Text
312 lines
6 KiB
Text
#include "vr9.dtsi"
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/mips/lantiq_rcu_gphy.h>
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/ {
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compatible = "arcadyan,vgv7519", "lantiq,xway", "lantiq,vr9";
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chosen {
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bootargs = "console=ttyLTQ0,115200 mem=62M vpe1_load_addr=0x83e00000 vpe1_mem=2M maxvpes=1 maxtcs=1 nosmp";
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};
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aliases {
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led-boot = &power_green;
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led-failsafe = &power_red;
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led-running = &power_green;
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led-dsl = &broadband_green;
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led-internet = &internet_green;
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led-wifi = &wireless_green;
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};
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memory@0 {
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reg = <0x0 0x4000000>;
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};
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gpio-keys-polled {
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compatible = "gpio-keys-polled";
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#address-cells = <1>;
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#size-cells = <0>;
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poll-interval = <100>;
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reset {
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label = "reset";
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gpios = <&gpio 9 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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};
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eco {
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label = "eco";
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gpios = <&gpio 41 GPIO_ACTIVE_LOW>;
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linux,code = <BTN_0>;
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};
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rfkill {
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label = "rfkill";
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gpios = <&gpio 45 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RFKILL>;
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};
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wps {
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label = "wps";
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gpios = <&gpio 10 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_WPS_BUTTON>;
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};
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};
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gpio-leds {
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compatible = "gpio-leds";
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eco {
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label = "vgv7519:blue:eco";
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gpios = <&stp 2 GPIO_ACTIVE_LOW>;
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};
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wps_red {
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label = "vgv7519:red:wps";
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gpios = <&stp 3 GPIO_ACTIVE_LOW>;
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};
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wps_green {
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label = "vgv7519:green:wps";
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gpios = <&stp 4 GPIO_ACTIVE_LOW>;
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};
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upgrade {
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label = "vgv7519:blue:upgrade";
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gpios = <&stp 5 GPIO_ACTIVE_LOW>;
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};
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tv {
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label = "vgv7519:green:tv";
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gpios = <&stp 6 GPIO_ACTIVE_LOW>;
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};
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internet_green: internet_green {
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label = "vgv7519:green:internet";
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gpios = <&stp 7 GPIO_ACTIVE_LOW>;
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};
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internet_red {
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label = "vgv7519:red:internet";
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gpios = <&stp 8 GPIO_ACTIVE_LOW>;
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};
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broadband_red {
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label = "vgv7519:red:broadband";
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gpios = <&stp 9 GPIO_ACTIVE_LOW>;
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};
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broadband_green: broadband_green {
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label = "vgv7519:green:broadband";
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gpios = <&stp 10 GPIO_ACTIVE_LOW>;
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};
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voice {
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label = "vgv7519:green:voice";
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gpios = <&stp 11 GPIO_ACTIVE_LOW>;
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};
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wireless_red {
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label = "vgv7519:red:wireless";
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gpios = <&stp 12 GPIO_ACTIVE_LOW>;
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};
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wireless_green: wireless_green {
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label = "vgv7519:green:wireless";
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gpios = <&stp 13 GPIO_ACTIVE_LOW>;
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};
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power_green: power2 {
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label = "vgv7519:green:power";
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gpios = <&stp 14 GPIO_ACTIVE_LOW>;
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default-state = "keep";
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};
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power_red: power {
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label = "vgv7519:red:power";
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gpios = <&stp 15 GPIO_ACTIVE_LOW>;
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};
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};
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usb_vbus: regulator-usb-vbus {
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compatible = "regulator-fixed";
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regulator-name = "USB_VBUS";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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gpio = <&gpio 32 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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};
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ð0 {
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lan: interface@0 {
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compatible = "lantiq,xrx200-pdi";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0>;
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mtd-mac-address = <&boardconfig 0x16>;
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mtd-mac-address-increment = <1>;
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lantiq,switch;
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ethernet@0 {
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compatible = "lantiq,xrx200-pdi-port";
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reg = <0>;
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phy-mode = "rgmii";
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phy-handle = <&phy0>;
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};
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ethernet@1 {
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compatible = "lantiq,xrx200-pdi-port";
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reg = <1>;
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phy-mode = "rgmii";
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phy-handle = <&phy1>;
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};
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ethernet@2 {
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compatible = "lantiq,xrx200-pdi-port";
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reg = <2>;
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phy-mode = "gmii";
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phy-handle = <&phy11>;
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};
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ethernet@4 {
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compatible = "lantiq,xrx200-pdi-port";
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reg = <4>;
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phy-mode = "gmii";
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phy-handle = <&phy13>;
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};
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ethernet@5 {
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compatible = "lantiq,xrx200-pdi-port";
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reg = <5>;
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phy-mode = "rgmii";
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phy-handle = <&phy5>;
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};
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};
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mdio@0 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "lantiq,xrx200-mdio";
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reg = <0>;
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phy0: ethernet-phy@0 {
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reg = <0x0>;
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compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
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};
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phy1: ethernet-phy@1 {
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reg = <0x1>;
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compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
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};
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phy5: ethernet-phy@5 {
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reg = <0x5>;
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compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
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};
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phy11: ethernet-phy@11 {
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reg = <0x11>;
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compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
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};
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phy13: ethernet-phy@13 {
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reg = <0x13>;
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compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
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};
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};
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};
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&gphy0 {
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lantiq,gphy-mode = <GPHY_MODE_GE>;
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};
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&gphy1 {
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lantiq,gphy-mode = <GPHY_MODE_GE>;
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};
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&gpio {
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pinctrl-names = "default";
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pinctrl-0 = <&state_default>;
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state_default: pinmux {
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stp {
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lantiq,groups = "stp";
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lantiq,function = "stp";
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lantiq,open-drain = <0>;
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lantiq,output = <1>;
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lantiq,pull = <0>;
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};
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mdio {
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lantiq,groups = "mdio";
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lantiq,function = "mdio";
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};
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pci-rst {
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lantiq,pins = "io21";
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lantiq,open-drain = <0>;
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lantiq,pull = <0>;
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lantiq,output = <1>;
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};
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gphy-leds {
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lantiq,groups = "gphy0 led1", "gphy1 led0";
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lantiq,function = "gphy";
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lantiq,open-drain = <0>;
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lantiq,pull = <0>;
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lantiq,output = <1>;
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};
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};
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};
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&localbus {
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nor@0 {
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compatible = "lantiq,nor";
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bank-width = <2>;
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reg = <0 0x0 0x800000>, <1 0x800000 0x800000>;
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#address-cells = <1>;
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#size-cells = <1>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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boardconfig: partition@40000 {
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label = "board_config";
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reg = <0x40000 0x10000>;
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read-only;
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};
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};
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};
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};
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&pci0 {
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status = "okay";
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gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
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wifi@1814,3091 {
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compatible = "pci1814,3091";
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reg = <0x7000 0 0 0 0>;
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ralink,mtd-eeprom = <&boardconfig 0x410>;
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ralink,mtd-eeprom-swap;
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mtd-mac-address = <&boardconfig 0x16>;
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mtd-mac-address-increment = <1>;
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};
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};
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&pcie0 {
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status = "disabled";
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};
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&stp {
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lantiq,shadow = <0xffff>;
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lantiq,groups = <0x3>;
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lantiq,dsl = <0x0>;
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lantiq,phy1 = <0x0>;
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lantiq,phy2 = <0x0>;
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/* lantiq,rising; */
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};
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&usb_phy0 {
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status = "okay";
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phy-supply = <&usb_vbus>;
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};
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&usb_phy1 {
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status = "okay";
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phy-supply = <&usb_vbus>;
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};
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&usb0 {
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status = "okay";
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};
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&usb1 {
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status = "okay";
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};
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&vmmc {
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status = "okay";
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gpios = <&gpio 30 GPIO_ACTIVE_HIGH //fxs relay
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&gpio 31 GPIO_ACTIVE_HIGH //still unknown
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&gpio 3 GPIO_ACTIVE_HIGH>; //reset_slic?
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};
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