64b53247c4
Refresh patches. Remove upstreamed patch: generic/pending/181-net-usb-add-lte-modem-wistron-neweb-d18q1.patch Update patches that no longer applies: generic/hack/901-debloat_sock_diag.patch Compile-tested on: x86/64. Runtime-tested on: x86/64. Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
44 lines
1.6 KiB
Diff
44 lines
1.6 KiB
Diff
From 36f70702b66cd3453b65d46b5c26ea87d8897363 Mon Sep 17 00:00:00 2001
|
|
From: Chunfeng Yun <chunfeng.yun@mediatek.com>
|
|
Date: Fri, 13 Oct 2017 17:10:46 +0800
|
|
Subject: [PATCH 112/224] usb: mtu3: set otg_sel for u2port only if works as
|
|
dual-role mode
|
|
|
|
When set otg_sel(SSUSB_U2_PORT_OTG_SEL) for u2port which supports
|
|
dual-role mode, the controller will automatically switch mode
|
|
between host and device according to IDDIG signal. But if the
|
|
u2port only supports device mode, and no IDDIG pin is provided,
|
|
setting otg_sel may cause failure of detection by host.
|
|
So set it only for dual-role mode.
|
|
|
|
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
|
|
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
|
|
---
|
|
drivers/usb/mtu3/mtu3_core.c | 9 +++++++--
|
|
1 file changed, 7 insertions(+), 2 deletions(-)
|
|
|
|
--- a/drivers/usb/mtu3/mtu3_core.c
|
|
+++ b/drivers/usb/mtu3/mtu3_core.c
|
|
@@ -115,7 +115,9 @@ static int mtu3_device_enable(struct mtu
|
|
mtu3_clrbits(ibase, SSUSB_U2_CTRL(0),
|
|
(SSUSB_U2_PORT_DIS | SSUSB_U2_PORT_PDN |
|
|
SSUSB_U2_PORT_HOST_SEL));
|
|
- mtu3_setbits(ibase, SSUSB_U2_CTRL(0), SSUSB_U2_PORT_OTG_SEL);
|
|
+
|
|
+ if (mtu->ssusb->dr_mode == USB_DR_MODE_OTG)
|
|
+ mtu3_setbits(ibase, SSUSB_U2_CTRL(0), SSUSB_U2_PORT_OTG_SEL);
|
|
|
|
return ssusb_check_clocks(mtu->ssusb, check_clk);
|
|
}
|
|
@@ -130,7 +132,10 @@ static void mtu3_device_disable(struct m
|
|
|
|
mtu3_setbits(ibase, SSUSB_U2_CTRL(0),
|
|
SSUSB_U2_PORT_DIS | SSUSB_U2_PORT_PDN);
|
|
- mtu3_clrbits(ibase, SSUSB_U2_CTRL(0), SSUSB_U2_PORT_OTG_SEL);
|
|
+
|
|
+ if (mtu->ssusb->dr_mode == USB_DR_MODE_OTG)
|
|
+ mtu3_clrbits(ibase, SSUSB_U2_CTRL(0), SSUSB_U2_PORT_OTG_SEL);
|
|
+
|
|
mtu3_setbits(ibase, U3D_SSUSB_IP_PW_CTRL2, SSUSB_IP_DEV_PDN);
|
|
}
|
|
|