c8eed9a50a
The mips74k subtarget of brcm47xx configures gcc to compile for mips32r2; however, the generated kernel config for 3.14 and later kernels ends up with CPU_MIPS32_R1 and CPU_MIPSR1 selected. The generated kernel config for the 3.10 kernel (Barrier Breaker) properly selected CPU_MIPS32_R2 and CPU_MIPSR2. Modify the default kernel config for mips74k to explicitly select CPU_MIPS32_R2 and CPU_MIPSR2. Signed-off-by: Nathan Hintz <nlhintz@hotmail.com> Tested-by: Rafał Miłecki <zajec5@gmail.com> SVN-Revision: 45469
19 lines
548 B
Text
19 lines
548 B
Text
# CONFIG_ADM6996_PHY is not set
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# CONFIG_BCM47XX_SSB is not set
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CONFIG_BGMAC=y
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CONFIG_BOUNCE=y
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# CONFIG_CPU_MIPS32_R1 is not set
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# CONFIG_CPU_MIPSR1 is not set
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CONFIG_CPU_MIPS32_R2=y
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CONFIG_CPU_MIPSR2=y
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# CONFIG_FIXED_PHY is not set
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# CONFIG_GPIO_WDT is not set
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CONFIG_HIGHMEM=y
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# CONFIG_SSB is not set
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# CONFIG_SSB_DRIVER_EXTIF is not set
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# CONFIG_SSB_DRIVER_GIGE is not set
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# CONFIG_SSB_DRIVER_MIPS is not set
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# CONFIG_SSB_EMBEDDED is not set
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# CONFIG_SSB_PCICORE_HOSTMODE is not set
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# CONFIG_SSB_SERIAL is not set
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# CONFIG_SSB_SFLASH is not set
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