15a14cf166
The QorIQ LS1012A processor, optimized for battery-backed or USB-powered, integrates a single ARM Cortex-A53 core with a hardware packet forwarding engine and high-speed interfaces to deliver line-rate networking performance. QorIQ LS1012A Reference Design System (LS1012ARDB) is a high-performance development platform, with a complete debugging environment. The LS1012ARDB board supports the QorIQ LS1012A processor and is optimized to support the high-bandwidth DDR3L memory and a full complement of high-speed SerDes ports. LEDE/OPENWRT will auto strip executable program file while make. So we need select CONFIG_NO_STRIP=y while make menuconfig to avoid the ppfe network fiemware be destroyed, then run make to build ls1012ardb firmware. The fsl-quadspi flash with jffs2 fs is unstable and arise some failed message. This issue have noticed the IP owner for investigate, hope he can solve it earlier. So the ls1012ardb now also provide a xx-firmware.ext4.bin as default firmware, and the uboot bootcmd will run wrtboot_ext4rfs for "rootfstype=ext4" bootargs. Signed-off-by: Yutang Jiang <yutang.jiang@nxp.com>
36 lines
1.2 KiB
Diff
36 lines
1.2 KiB
Diff
From 0bfcfaafa23af0e8c9ae9df3236831fcaaa597b8 Mon Sep 17 00:00:00 2001
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From: Anji J <anji.jagarlmudi@freescale.com>
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Date: Mon, 4 Apr 2016 15:07:47 +0530
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Subject: [PATCH 40/93] DNCPE-138 CSU config for PFE
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Configure PFE for NS access.
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Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>>
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Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
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---
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.../include/asm/arch-fsl-layerscape/ns_access.h | 2 ++
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1 file changed, 2 insertions(+)
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diff --git a/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h b/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h
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index 2fd33e1..5250ac7 100644
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--- a/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h
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+++ b/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h
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@@ -25,6 +25,7 @@ enum csu_cslx_ind {
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CSU_CSLX_PCIE3_IO,
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CSU_CSLX_USB3 = 20,
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CSU_CSLX_USB2,
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+ CSU_CSLX_PFE = 23,
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CSU_CSLX_SERDES = 32,
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CSU_CSLX_QDMA,
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CSU_CSLX_LPUART2,
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@@ -105,6 +106,7 @@ static struct csu_ns_dev ns_dev[] = {
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{CSU_CSLX_PCIE3_IO, CSU_ALL_RW},
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{CSU_CSLX_USB3, CSU_ALL_RW},
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{CSU_CSLX_USB2, CSU_ALL_RW},
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+ {CSU_CSLX_PFE, CSU_ALL_RW},
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{CSU_CSLX_SERDES, CSU_ALL_RW},
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{CSU_CSLX_QDMA, CSU_ALL_RW},
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{CSU_CSLX_LPUART2, CSU_ALL_RW},
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--
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1.7.9.5
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