15a14cf166
The QorIQ LS1012A processor, optimized for battery-backed or USB-powered, integrates a single ARM Cortex-A53 core with a hardware packet forwarding engine and high-speed interfaces to deliver line-rate networking performance. QorIQ LS1012A Reference Design System (LS1012ARDB) is a high-performance development platform, with a complete debugging environment. The LS1012ARDB board supports the QorIQ LS1012A processor and is optimized to support the high-bandwidth DDR3L memory and a full complement of high-speed SerDes ports. LEDE/OPENWRT will auto strip executable program file while make. So we need select CONFIG_NO_STRIP=y while make menuconfig to avoid the ppfe network fiemware be destroyed, then run make to build ls1012ardb firmware. The fsl-quadspi flash with jffs2 fs is unstable and arise some failed message. This issue have noticed the IP owner for investigate, hope he can solve it earlier. So the ls1012ardb now also provide a xx-firmware.ext4.bin as default firmware, and the uboot bootcmd will run wrtboot_ext4rfs for "rootfstype=ext4" bootargs. Signed-off-by: Yutang Jiang <yutang.jiang@nxp.com>
26 lines
845 B
Diff
26 lines
845 B
Diff
From 90ded6778736d5a0843d24eb8e5a47db72c05af9 Mon Sep 17 00:00:00 2001
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From: Mingkai Hu <mingkai.hu@nxp.com>
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Date: Mon, 18 Apr 2016 22:44:21 +0800
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Subject: [PATCH 21/93] sf: set the Uniform Sector to CR3NV instead of CR3V
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Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com>
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---
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drivers/mtd/spi/spi_flash.c | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
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index 865e929..97e53c7 100644
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--- a/drivers/mtd/spi/spi_flash.c
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+++ b/drivers/mtd/spi/spi_flash.c
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@@ -942,7 +942,7 @@ int spi_flash_decode_fdt(const void *blob, struct spi_flash *flash)
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static int spansion_s25fss_disable_4KB_erase(struct spi_slave *spi)
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{
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u8 cmd[4];
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- u32 offset = 0x800004; /* CR3V register offset */
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+ u32 offset = 0x000004; /* CR3NV register offset */
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u8 cr3v;
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int ret;
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--
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1.7.9.5
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