b988168906
* add new patches for bcm4716 SoC * add support for serial flash on bcma bus SVN-Revision: 27723
166 lines
4.8 KiB
Diff
166 lines
4.8 KiB
Diff
From 5088e81ecc5c953df7de84eeedd0817326bc4be4 Mon Sep 17 00:00:00 2001
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From: Hauke Mehrtens <hauke@hauke-m.de>
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Date: Mon, 6 Jun 2011 00:07:33 +0200
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Subject: [PATCH 06/22] bcma: add serial console support
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This adds support for serial console to bcma, when operating on an SoC.
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Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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---
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drivers/bcma/bcma_private.h | 8 ++++
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drivers/bcma/driver_chipcommon.c | 48 +++++++++++++++++++++++++++
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drivers/bcma/driver_chipcommon_pmu.c | 26 ++++++++++++++
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drivers/bcma/driver_mips.c | 1 +
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include/linux/bcma/bcma_driver_chipcommon.h | 14 ++++++++
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5 files changed, 97 insertions(+), 0 deletions(-)
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--- a/drivers/bcma/bcma_private.h
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+++ b/drivers/bcma/bcma_private.h
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@@ -29,6 +29,14 @@ void bcma_init_bus(struct bcma_bus *bus)
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/* sprom.c */
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int bcma_sprom_get(struct bcma_bus *bus);
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+/* driver_chipcommon.c */
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+#ifdef CONFIG_BCMA_DRIVER_MIPS
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+void bcma_chipco_serial_init(struct bcma_drv_cc *cc);
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+#endif /* CONFIG_BCMA_DRIVER_MIPS */
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+
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+/* driver_chipcommon_pmu.c */
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+u32 bcma_pmu_alp_clock(struct bcma_drv_cc *cc);
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+
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#ifdef CONFIG_BCMA_HOST_PCI
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/* host_pci.c */
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extern int __init bcma_host_pci_init(void);
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--- a/drivers/bcma/driver_chipcommon.c
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+++ b/drivers/bcma/driver_chipcommon.c
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@@ -106,3 +106,51 @@ u32 bcma_chipco_gpio_polarity(struct bcm
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{
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return bcma_cc_write32_masked(cc, BCMA_CC_GPIOPOL, mask, value);
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}
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+
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+#ifdef CONFIG_BCMA_DRIVER_MIPS
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+void bcma_chipco_serial_init(struct bcma_drv_cc *cc)
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+{
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+ unsigned int irq;
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+ u32 baud_base;
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+ u32 i;
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+ unsigned int ccrev = cc->core->id.rev;
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+ struct bcma_serial_port *ports = cc->serial_ports;
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+
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+ if (ccrev >= 11 && ccrev != 15) {
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+ /* Fixed ALP clock */
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+ baud_base = bcma_pmu_alp_clock(cc);
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+ if (ccrev >= 21) {
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+ /* Turn off UART clock before switching clocksource. */
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+ bcma_cc_write32(cc, BCMA_CC_CORECTL,
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+ bcma_cc_read32(cc, BCMA_CC_CORECTL)
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+ & ~BCMA_CC_CORECTL_UARTCLKEN);
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+ }
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+ /* Set the override bit so we don't divide it */
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+ bcma_cc_write32(cc, BCMA_CC_CORECTL,
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+ bcma_cc_read32(cc, BCMA_CC_CORECTL)
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+ | BCMA_CC_CORECTL_UARTCLK0);
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+ if (ccrev >= 21) {
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+ /* Re-enable the UART clock. */
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+ bcma_cc_write32(cc, BCMA_CC_CORECTL,
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+ bcma_cc_read32(cc, BCMA_CC_CORECTL)
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+ | BCMA_CC_CORECTL_UARTCLKEN);
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+ }
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+ } else {
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+ pr_err("serial not supported on this device ccrev: 0x%x\n",
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+ ccrev);
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+ return;
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+ }
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+
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+ irq = bcma_core_mips_irq(cc->core);
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+
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+ /* Determine the registers of the UARTs */
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+ cc->nr_serial_ports = (cc->capabilities & BCMA_CC_CAP_NRUART);
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+ for (i = 0; i < cc->nr_serial_ports; i++) {
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+ ports[i].regs = cc->core->io_addr + BCMA_CC_UART0_DATA +
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+ (i * 256);
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+ ports[i].irq = irq;
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+ ports[i].baud_base = baud_base;
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+ ports[i].reg_shift = 0;
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+ }
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+}
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+#endif /* CONFIG_BCMA_DRIVER_MIPS */
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--- a/drivers/bcma/driver_chipcommon_pmu.c
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+++ b/drivers/bcma/driver_chipcommon_pmu.c
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@@ -136,3 +136,29 @@ void bcma_pmu_init(struct bcma_drv_cc *c
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bcma_pmu_swreg_init(cc);
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bcma_pmu_workarounds(cc);
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}
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+
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+u32 bcma_pmu_alp_clock(struct bcma_drv_cc *cc)
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+{
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+ struct bcma_bus *bus = cc->core->bus;
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+
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+ switch (bus->chipinfo.id) {
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+ case 0x4716:
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+ case 0x4748:
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+ case 47162:
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+ case 0x4313:
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+ case 0x5357:
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+ case 0x4749:
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+ case 53572:
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+ /* always 20Mhz */
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+ return 20000 * 1000;
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+ case 0x5356:
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+ case 0x5300:
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+ /* always 25Mhz */
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+ return 25000 * 1000;
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+ default:
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+ pr_warn("No ALP clock specified for %04X device, "
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+ "pmu rev. %d, using default %d Hz\n",
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+ bus->chipinfo.id, cc->pmu.rev, BCMA_CC_PMU_ALP_CLOCK);
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+ }
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+ return BCMA_CC_PMU_ALP_CLOCK;
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+}
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--- a/drivers/bcma/driver_mips.c
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+++ b/drivers/bcma/driver_mips.c
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@@ -238,6 +238,7 @@ void bcma_core_mips_init(struct bcma_drv
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if (mcore->setup_done)
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return;
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+ bcma_chipco_serial_init(&bus->drv_cc);
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bcma_core_mips_flash_detect(mcore);
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mcore->setup_done = true;
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}
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--- a/include/linux/bcma/bcma_driver_chipcommon.h
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+++ b/include/linux/bcma/bcma_driver_chipcommon.h
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@@ -241,6 +241,9 @@
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#define BCMA_CC_SPROM 0x0800 /* SPROM beginning */
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#define BCMA_CC_SPROM_PCIE6 0x0830 /* SPROM beginning on PCIe rev >= 6 */
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+/* ALP clock on pre-PMU chips */
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+#define BCMA_CC_PMU_ALP_CLOCK 20000000
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+
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/* Data for the PMU, if available.
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* Check availability with ((struct bcma_chipcommon)->capabilities & BCMA_CC_CAP_PMU)
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*/
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@@ -255,6 +258,14 @@ struct bcma_pflash {
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u32 window;
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u32 window_size;
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};
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+
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+struct bcma_serial_port {
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+ void *regs;
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+ unsigned long clockspeed;
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+ unsigned int irq;
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+ unsigned int baud_base;
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+ unsigned int reg_shift;
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+};
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#endif /* CONFIG_BCMA_DRIVER_MIPS */
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struct bcma_drv_cc {
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@@ -268,6 +279,9 @@ struct bcma_drv_cc {
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struct bcma_chipcommon_pmu pmu;
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#ifdef CONFIG_BCMA_DRIVER_MIPS
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struct bcma_pflash pflash;
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+
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+ int nr_serial_ports;
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+ struct bcma_serial_port serial_ports[4];
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#endif /* CONFIG_BCMA_DRIVER_MIPS */
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};
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