7e20e4ab96
Refreshed all patches. Removed upstreamed hunks in: - 703-phy-support-layerscape.patch Compile-tested on: ar71xx, layerscape Runtime-tested on: ar71xx Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
187 lines
8.4 KiB
Diff
187 lines
8.4 KiB
Diff
From 05aba5763dcf35eddc58aaf99c9f16d19730e0a8 Mon Sep 17 00:00:00 2001
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From: Cyrille Pitchen <cyrille.pitchen@atmel.com>
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Date: Thu, 27 Oct 2016 11:55:39 +0200
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Subject: [PATCH] mtd: spi-nor: rename SPINOR_OP_* macros of the 4-byte address
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op codes
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This patch renames the SPINOR_OP_* macros of the 4-byte address
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instruction set so the new names all share a common pattern: the 4-byte
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address name is built from the 3-byte address name appending the "_4B"
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suffix.
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The patch also introduces new op codes to support other SPI protocols such
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as SPI 1-4-4 and SPI 1-2-2.
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This is a transitional patch and will help a later patch of spi-nor.c
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to automate the translation from the 3-byte address op codes into their
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4-byte address version.
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Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
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Acked-by: Mark Brown <broonie@kernel.org>
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Acked-by: Marek Vasut <marek.vasut@gmail.com>
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---
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drivers/mtd/devices/serial_flash_cmds.h | 7 -------
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drivers/mtd/devices/st_spi_fsm.c | 28 ++++++++++++++--------------
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drivers/mtd/spi-nor/spi-nor.c | 8 ++++----
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drivers/spi/spi-bcm-qspi.c | 6 +++---
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include/linux/mtd/spi-nor.h | 22 ++++++++++++++++------
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5 files changed, 37 insertions(+), 34 deletions(-)
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--- a/drivers/mtd/devices/serial_flash_cmds.h
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+++ b/drivers/mtd/devices/serial_flash_cmds.h
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@@ -18,19 +18,12 @@
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#define SPINOR_OP_RDVCR 0x85
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/* JEDEC Standard - Serial Flash Discoverable Parmeters (SFDP) Commands */
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-#define SPINOR_OP_READ_1_2_2 0xbb /* DUAL I/O READ */
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-#define SPINOR_OP_READ_1_4_4 0xeb /* QUAD I/O READ */
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-
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#define SPINOR_OP_WRITE 0x02 /* PAGE PROGRAM */
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#define SPINOR_OP_WRITE_1_1_2 0xa2 /* DUAL INPUT PROGRAM */
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#define SPINOR_OP_WRITE_1_2_2 0xd2 /* DUAL INPUT EXT PROGRAM */
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#define SPINOR_OP_WRITE_1_1_4 0x32 /* QUAD INPUT PROGRAM */
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#define SPINOR_OP_WRITE_1_4_4 0x12 /* QUAD INPUT EXT PROGRAM */
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-/* READ commands with 32-bit addressing */
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-#define SPINOR_OP_READ4_1_2_2 0xbc
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-#define SPINOR_OP_READ4_1_4_4 0xec
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-
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/* Configuration flags */
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#define FLASH_FLAG_SINGLE 0x000000ff
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#define FLASH_FLAG_READ_WRITE 0x00000001
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--- a/drivers/mtd/devices/st_spi_fsm.c
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+++ b/drivers/mtd/devices/st_spi_fsm.c
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@@ -507,13 +507,13 @@ static struct seq_rw_config n25q_read3_c
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* - 'FAST' variants configured for 8 dummy cycles (see note above.)
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*/
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static struct seq_rw_config n25q_read4_configs[] = {
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- {FLASH_FLAG_READ_1_4_4, SPINOR_OP_READ4_1_4_4, 0, 4, 4, 0x00, 0, 8},
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- {FLASH_FLAG_READ_1_1_4, SPINOR_OP_READ4_1_1_4, 0, 1, 4, 0x00, 0, 8},
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- {FLASH_FLAG_READ_1_2_2, SPINOR_OP_READ4_1_2_2, 0, 2, 2, 0x00, 0, 8},
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- {FLASH_FLAG_READ_1_1_2, SPINOR_OP_READ4_1_1_2, 0, 1, 2, 0x00, 0, 8},
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- {FLASH_FLAG_READ_FAST, SPINOR_OP_READ4_FAST, 0, 1, 1, 0x00, 0, 8},
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- {FLASH_FLAG_READ_WRITE, SPINOR_OP_READ4, 0, 1, 1, 0x00, 0, 0},
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- {0x00, 0, 0, 0, 0, 0x00, 0, 0},
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+ {FLASH_FLAG_READ_1_4_4, SPINOR_OP_READ_1_4_4_4B, 0, 4, 4, 0x00, 0, 8},
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+ {FLASH_FLAG_READ_1_1_4, SPINOR_OP_READ_1_1_4_4B, 0, 1, 4, 0x00, 0, 8},
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+ {FLASH_FLAG_READ_1_2_2, SPINOR_OP_READ_1_2_2_4B, 0, 2, 2, 0x00, 0, 8},
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+ {FLASH_FLAG_READ_1_1_2, SPINOR_OP_READ_1_1_2_4B, 0, 1, 2, 0x00, 0, 8},
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+ {FLASH_FLAG_READ_FAST, SPINOR_OP_READ_FAST_4B, 0, 1, 1, 0x00, 0, 8},
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+ {FLASH_FLAG_READ_WRITE, SPINOR_OP_READ_4B, 0, 1, 1, 0x00, 0, 0},
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+ {0x00, 0, 0, 0, 0, 0x00, 0, 0},
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};
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/*
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@@ -553,13 +553,13 @@ static int stfsm_mx25_en_32bit_addr_seq(
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* entering a state that is incompatible with the SPIBoot Controller.
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*/
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static struct seq_rw_config stfsm_s25fl_read4_configs[] = {
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- {FLASH_FLAG_READ_1_4_4, SPINOR_OP_READ4_1_4_4, 0, 4, 4, 0x00, 2, 4},
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- {FLASH_FLAG_READ_1_1_4, SPINOR_OP_READ4_1_1_4, 0, 1, 4, 0x00, 0, 8},
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- {FLASH_FLAG_READ_1_2_2, SPINOR_OP_READ4_1_2_2, 0, 2, 2, 0x00, 4, 0},
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- {FLASH_FLAG_READ_1_1_2, SPINOR_OP_READ4_1_1_2, 0, 1, 2, 0x00, 0, 8},
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- {FLASH_FLAG_READ_FAST, SPINOR_OP_READ4_FAST, 0, 1, 1, 0x00, 0, 8},
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- {FLASH_FLAG_READ_WRITE, SPINOR_OP_READ4, 0, 1, 1, 0x00, 0, 0},
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- {0x00, 0, 0, 0, 0, 0x00, 0, 0},
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+ {FLASH_FLAG_READ_1_4_4, SPINOR_OP_READ_1_4_4_4B, 0, 4, 4, 0x00, 2, 4},
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+ {FLASH_FLAG_READ_1_1_4, SPINOR_OP_READ_1_1_4_4B, 0, 1, 4, 0x00, 0, 8},
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+ {FLASH_FLAG_READ_1_2_2, SPINOR_OP_READ_1_2_2_4B, 0, 2, 2, 0x00, 4, 0},
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+ {FLASH_FLAG_READ_1_1_2, SPINOR_OP_READ_1_1_2_4B, 0, 1, 2, 0x00, 0, 8},
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+ {FLASH_FLAG_READ_FAST, SPINOR_OP_READ_FAST_4B, 0, 1, 1, 0x00, 0, 8},
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+ {FLASH_FLAG_READ_WRITE, SPINOR_OP_READ_4B, 0, 1, 1, 0x00, 0, 0},
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+ {0x00, 0, 0, 0, 0, 0x00, 0, 0},
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};
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static struct seq_rw_config stfsm_s25fl_write4_configs[] = {
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--- a/drivers/mtd/spi-nor/spi-nor.c
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+++ b/drivers/mtd/spi-nor/spi-nor.c
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@@ -1638,16 +1638,16 @@ int spi_nor_scan(struct spi_nor *nor, co
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/* Dedicated 4-byte command set */
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switch (nor->flash_read) {
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case SPI_NOR_QUAD:
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- nor->read_opcode = SPINOR_OP_READ4_1_1_4;
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+ nor->read_opcode = SPINOR_OP_READ_1_1_4_4B;
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break;
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case SPI_NOR_DUAL:
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- nor->read_opcode = SPINOR_OP_READ4_1_1_2;
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+ nor->read_opcode = SPINOR_OP_READ_1_1_2_4B;
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break;
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case SPI_NOR_FAST:
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- nor->read_opcode = SPINOR_OP_READ4_FAST;
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+ nor->read_opcode = SPINOR_OP_READ_FAST_4B;
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break;
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case SPI_NOR_NORMAL:
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- nor->read_opcode = SPINOR_OP_READ4;
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+ nor->read_opcode = SPINOR_OP_READ_4B;
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break;
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}
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nor->program_opcode = SPINOR_OP_PP_4B;
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--- a/drivers/spi/spi-bcm-qspi.c
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+++ b/drivers/spi/spi-bcm-qspi.c
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@@ -371,7 +371,7 @@ static int bcm_qspi_bspi_set_flex_mode(s
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/* default mode, does not need flex_cmd */
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flex_mode = 0;
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else
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- command = SPINOR_OP_READ4_FAST;
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+ command = SPINOR_OP_READ_FAST_4B;
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break;
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case SPI_NBITS_DUAL:
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bpc = 0x00000001;
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@@ -384,7 +384,7 @@ static int bcm_qspi_bspi_set_flex_mode(s
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} else {
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command = SPINOR_OP_READ_1_1_2;
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if (spans_4byte)
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- command = SPINOR_OP_READ4_1_1_2;
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+ command = SPINOR_OP_READ_1_1_2_4B;
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}
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break;
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case SPI_NBITS_QUAD:
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@@ -399,7 +399,7 @@ static int bcm_qspi_bspi_set_flex_mode(s
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} else {
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command = SPINOR_OP_READ_1_1_4;
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if (spans_4byte)
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- command = SPINOR_OP_READ4_1_1_4;
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+ command = SPINOR_OP_READ_1_1_4_4B;
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}
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break;
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default:
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--- a/include/linux/mtd/spi-nor.h
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+++ b/include/linux/mtd/spi-nor.h
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@@ -43,9 +43,13 @@
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#define SPINOR_OP_WRSR 0x01 /* Write status register 1 byte */
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#define SPINOR_OP_READ 0x03 /* Read data bytes (low frequency) */
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#define SPINOR_OP_READ_FAST 0x0b /* Read data bytes (high frequency) */
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-#define SPINOR_OP_READ_1_1_2 0x3b /* Read data bytes (Dual SPI) */
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-#define SPINOR_OP_READ_1_1_4 0x6b /* Read data bytes (Quad SPI) */
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+#define SPINOR_OP_READ_1_1_2 0x3b /* Read data bytes (Dual Output SPI) */
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+#define SPINOR_OP_READ_1_2_2 0xbb /* Read data bytes (Dual I/O SPI) */
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+#define SPINOR_OP_READ_1_1_4 0x6b /* Read data bytes (Quad Output SPI) */
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+#define SPINOR_OP_READ_1_4_4 0xeb /* Read data bytes (Quad I/O SPI) */
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#define SPINOR_OP_PP 0x02 /* Page program (up to 256 bytes) */
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+#define SPINOR_OP_PP_1_1_4 0x32 /* Quad page program */
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+#define SPINOR_OP_PP_1_4_4 0x38 /* Quad page program */
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#define SPINOR_OP_BE_4K 0x20 /* Erase 4KiB block */
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#define SPINOR_OP_BE_4K_PMC 0xd7 /* Erase 4KiB block on PMC chips */
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#define SPINOR_OP_BE_32K 0x52 /* Erase 32KiB block */
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@@ -56,11 +60,17 @@
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#define SPINOR_OP_RDFSR 0x70 /* Read flag status register */
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/* 4-byte address opcodes - used on Spansion and some Macronix flashes. */
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-#define SPINOR_OP_READ4 0x13 /* Read data bytes (low frequency) */
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-#define SPINOR_OP_READ4_FAST 0x0c /* Read data bytes (high frequency) */
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-#define SPINOR_OP_READ4_1_1_2 0x3c /* Read data bytes (Dual SPI) */
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-#define SPINOR_OP_READ4_1_1_4 0x6c /* Read data bytes (Quad SPI) */
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+#define SPINOR_OP_READ_4B 0x13 /* Read data bytes (low frequency) */
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+#define SPINOR_OP_READ_FAST_4B 0x0c /* Read data bytes (high frequency) */
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+#define SPINOR_OP_READ_1_1_2_4B 0x3c /* Read data bytes (Dual Output SPI) */
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+#define SPINOR_OP_READ_1_2_2_4B 0xbc /* Read data bytes (Dual I/O SPI) */
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+#define SPINOR_OP_READ_1_1_4_4B 0x6c /* Read data bytes (Quad Output SPI) */
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+#define SPINOR_OP_READ_1_4_4_4B 0xec /* Read data bytes (Quad I/O SPI) */
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#define SPINOR_OP_PP_4B 0x12 /* Page program (up to 256 bytes) */
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+#define SPINOR_OP_PP_1_1_4_4B 0x34 /* Quad page program */
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+#define SPINOR_OP_PP_1_4_4_4B 0x3e /* Quad page program */
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+#define SPINOR_OP_BE_4K_4B 0x21 /* Erase 4KiB block */
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+#define SPINOR_OP_BE_32K_4B 0x5c /* Erase 32KiB block */
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#define SPINOR_OP_SE_4B 0xdc /* Sector erase (usually 64KiB) */
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/* Used for SST flashes only. */
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