c9ae111a20
This is a backport of the patches accepted to the Linux mainline related to mvebu SoC (Armada XP and Armada 370) between Linux v3.12, and Linux v3.13. This work mainly covers: * Finishes work for sharing the pxa nand driver(drivers/mtd/nand/pxa3xx_nand.c) between the PXA family, and the Armada family. * timer initialization update, and access function for the Armada family. * Generic IRQ handling backporting. * Some bug fixes. Signed-off-by: Seif Mazareeb <seif.mazareeb@gmail.com> CC: Luka Perkov <luka@openwrt.org> SVN-Revision: 39566
100 lines
3.1 KiB
Diff
100 lines
3.1 KiB
Diff
From 70c36de37f357f38b5a56292534133d75e7d8870 Mon Sep 17 00:00:00 2001
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From: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
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Date: Mon, 25 Nov 2013 12:36:18 -0300
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Subject: [PATCH 157/203] mtd: nand: pxa3xx: Consolidate ECC initialization
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In order to avoid code duplication, let's consolidate the ECC setting
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for all SoC variants. Such decision is based on page size and ECC
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strength requirements.
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Also, provide a default value for the case where such ECC information
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is not provided (non-ONFI devices).
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Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
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---
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drivers/mtd/nand/pxa3xx_nand.c | 40 ++++++++++++++++------------------------
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1 file changed, 16 insertions(+), 24 deletions(-)
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--- a/drivers/mtd/nand/pxa3xx_nand.c
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+++ b/drivers/mtd/nand/pxa3xx_nand.c
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@@ -1335,13 +1335,9 @@ static int pxa3xx_nand_sensing(struct px
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static int pxa_ecc_init(struct pxa3xx_nand_info *info,
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struct nand_ecc_ctrl *ecc,
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- int strength, int page_size)
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+ int strength, int ecc_stepsize, int page_size)
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{
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- /*
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- * We don't use strength here as the PXA variant
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- * is used with non-ONFI compliant devices.
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- */
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- if (page_size == 2048) {
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+ if (strength == 1 && ecc_stepsize == 512 && page_size == 2048) {
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info->chunk_size = 2048;
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info->spare_size = 40;
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info->ecc_size = 24;
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@@ -1350,7 +1346,7 @@ static int pxa_ecc_init(struct pxa3xx_na
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ecc->strength = 1;
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return 1;
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- } else if (page_size == 512) {
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+ } else if (strength == 1 && ecc_stepsize == 512 && page_size == 512) {
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info->chunk_size = 512;
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info->spare_size = 8;
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info->ecc_size = 8;
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@@ -1358,19 +1354,12 @@ static int pxa_ecc_init(struct pxa3xx_na
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ecc->size = 512;
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ecc->strength = 1;
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return 1;
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- }
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- return 0;
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-}
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-static int armada370_ecc_init(struct pxa3xx_nand_info *info,
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- struct nand_ecc_ctrl *ecc,
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- int strength, int ecc_stepsize, int page_size)
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-{
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/*
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* Required ECC: 4-bit correction per 512 bytes
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* Select: 16-bit correction per 2048 bytes
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*/
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- if (strength == 4 && ecc_stepsize == 512 && page_size == 4096) {
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+ } else if (strength == 4 && ecc_stepsize == 512 && page_size == 4096) {
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info->ecc_bch = 1;
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info->chunk_size = 2048;
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info->spare_size = 32;
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@@ -1411,6 +1400,7 @@ static int pxa3xx_nand_scan(struct mtd_i
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uint32_t id = -1;
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uint64_t chipsize;
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int i, ret, num;
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+ uint16_t ecc_strength, ecc_step;
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if (pdata->keep_config && !pxa3xx_nand_detect_config(info))
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goto KEEP_CONFIG;
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@@ -1505,15 +1495,17 @@ KEEP_CONFIG:
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}
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}
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- if (info->variant == PXA3XX_NAND_VARIANT_ARMADA370)
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- ret = armada370_ecc_init(info, &chip->ecc,
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- chip->ecc_strength_ds,
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- chip->ecc_step_ds,
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- mtd->writesize);
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- else
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- ret = pxa_ecc_init(info, &chip->ecc,
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- chip->ecc_strength_ds,
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- mtd->writesize);
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+ ecc_strength = chip->ecc_strength_ds;
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+ ecc_step = chip->ecc_step_ds;
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+
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+ /* Set default ECC strength requirements on non-ONFI devices */
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+ if (ecc_strength < 1 && ecc_step < 1) {
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+ ecc_strength = 1;
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+ ecc_step = 512;
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+ }
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+
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+ ret = pxa_ecc_init(info, &chip->ecc, ecc_strength,
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+ ecc_step, mtd->writesize);
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if (!ret) {
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dev_err(&info->pdev->dev,
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"ECC strength %d at page size %d is not supported\n",
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