6eaf8b3d89
Updated the devicetree source files to make use of the following upstreamed drivers: - xrx200 ethernet phy - reset controller unit - dwc2 - fpi Use our custom xrx200 ethernet phy compatible to support boards, which have switched the vr9 revision during lifetime, with a single devicetree source file. By switching to the dwc2 driver + usb phy framework, we don't need to used our custom gpio power patch and can use a fixed regulator instead. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Signed-off-by: Mathias Kresin <dev@kresin.me>
339 lines
7 KiB
Text
339 lines
7 KiB
Text
#include <dt-bindings/gpio/gpio.h>
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "lantiq,xway", "lantiq,vr9";
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aliases {
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serial0 = &asc1;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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cpus {
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cpu@0 {
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compatible = "mips,mips34Kc";
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};
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};
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memory@0 {
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device_type = "memory";
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};
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cputemp@0 {
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compatible = "lantiq,cputemp";
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};
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biu@1f800000 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "lantiq,biu", "simple-bus";
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reg = <0x1f800000 0x800000>;
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ranges = <0x0 0x1f800000 0x7fffff>;
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icu0: icu@80200 {
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#interrupt-cells = <1>;
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interrupt-controller;
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compatible = "lantiq,icu";
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reg = <0x80200 0x28
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0x80228 0x28
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0x80250 0x28
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0x80278 0x28
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0x802a0 0x28>;
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};
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watchdog@803f0 {
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compatible = "lantiq,xrx100-wdt", "lantiq,xrx100-wdt";
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reg = <0x803f0 0x10>;
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regmap = <&rcu0>;
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};
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};
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sram@1f000000 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "lantiq,sram", "simple-bus";
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reg = <0x1f000000 0x800000>;
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ranges = <0x0 0x1f000000 0x7fffff>;
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eiu0: eiu@101000 {
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#interrupt-cells = <1>;
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interrupt-controller;
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compatible = "lantiq,eiu-xway";
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reg = <0x101000 0x1000>;
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interrupt-parent = <&icu0>;
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lantiq,eiu-irqs = <166 135 66 40 41 42>;
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};
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pmu0: pmu@102000 {
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compatible = "lantiq,pmu-xway";
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reg = <0x102000 0x1000>;
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};
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cgu0: cgu@103000 {
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compatible = "lantiq,cgu-xway";
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reg = <0x103000 0x1000>;
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};
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dcdc@106a00 {
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compatible = "lantiq,dcdc-xrx200";
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reg = <0x106a00 0x200>;
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};
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vmmc: vmmc@103000 {
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status = "disabled";
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compatible = "lantiq,vmmc-xway";
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reg = <0x103000 0x400>;
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interrupt-parent = <&icu0>;
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interrupts = <150 151 152 153 154 155>;
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};
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rcu0: rcu@203000 {
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compatible = "lantiq,xrx200-rcu", "simple-mfd", "syscon";
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reg = <0x203000 0x100>;
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ranges = <0x0 0x203000 0x100>;
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big-endian;
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gphy0: gphy@20 {
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compatible = "lantiq,xrx200-gphy";
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reg = <0x20 0x4>;
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resets = <&reset0 31 30>, <&reset1 7 7>;
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reset-names = "gphy", "gphy2";
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};
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gphy1: gphy@68 {
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compatible = "lantiq,xrx200-gphy";
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reg = <0x68 0x4>;
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resets = <&reset0 29 28>, <&reset1 6 6>;
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reset-names = "gphy", "gphy2";
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};
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reset0: reset-controller@10 {
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compatible = "lantiq,xrx200-reset";
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reg = <0x10 4>, <0x14 4>;
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#reset-cells = <2>;
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};
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reset1: reset-controller@48 {
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compatible = "lantiq,xrx200-reset";
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reg = <0x48 4>, <0x24 4>;
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#reset-cells = <2>;
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};
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usb_phy0: usb2-phy@18 {
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compatible = "lantiq,xrx200-usb2-phy";
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reg = <0x18 4>, <0x38 4>;
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status = "disabled";
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resets = <&reset1 4 4>, <&reset0 4 4>;
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reset-names = "phy", "ctrl";
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#phy-cells = <0>;
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};
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usb_phy1: usb2-phy@34 {
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compatible = "lantiq,xrx200-usb2-phy";
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reg = <0x34 4>, <0x3c 4>;
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status = "disabled";
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resets = <&reset1 5 4>, <&reset0 4 4>;
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reset-names = "phy", "ctrl";
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#phy-cells = <0>;
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};
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reboot@10 {
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compatible = "syscon-reboot";
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reg = <0x10 4>;
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regmap = <&rcu0>;
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offset = <0x10>;
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mask = <0x40000000>;
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};
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};
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};
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fpi@10000000 {
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compatible = "lantiq,xrx200-fpi", "simple-bus";
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ranges = <0x0 0x10000000 0xf000000>;
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reg = <0x1f400000 0x1000>,
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<0x10000000 0xf000000>;
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regmap = <&rcu0>;
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offset-endianness = <0x4c>;
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#address-cells = <1>;
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#size-cells = <1>;
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localbus: localbus@0 {
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#address-cells = <2>;
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#size-cells = <1>;
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ranges = <0 0 0x0 0x3ffffff /* addrsel0 */
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1 0 0x4000000 0x4000010>; /* addsel1 */
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compatible = "lantiq,localbus", "simple-bus";
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};
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gptu@e100a00 {
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compatible = "lantiq,gptu-xway";
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reg = <0xe100a00 0x100>;
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interrupt-parent = <&icu0>;
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interrupts = <126 127 128 129 130 131>;
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};
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asc0: serial@e100400 {
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compatible = "lantiq,asc";
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reg = <0xe100400 0x400>;
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interrupt-parent = <&icu0>;
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interrupts = <104 105 106>;
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status = "disabled";
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};
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spi: spi@e100800 {
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compatible = "lantiq,xrx200-spi", "lantiq,xrx100-spi";
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reg = <0xe100800 0x100>;
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interrupt-parent = <&icu0>;
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interrupts = <22 23 24>;
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interrupt-names = "spi_rx", "spi_tx", "spi_err",
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"spi_frm";
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#address-cells = <1>;
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#size-cells = <1>;
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status = "disabled";
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};
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gpio: pinmux@e100b10 {
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compatible = "lantiq,xrx200-pinctrl";
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#gpio-cells = <2>;
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gpio-controller;
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reg = <0xe100b10 0xa0>;
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};
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stp: stp@e100bb0 {
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status = "disabled";
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compatible = "lantiq,gpio-stp-xway";
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reg = <0xe100bb0 0x40>;
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#gpio-cells = <2>;
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gpio-controller;
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lantiq,shadow = <0xffffff>;
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lantiq,groups = <0x7>;
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lantiq,dsl = <0x0>;
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lantiq,phy1 = <0x0>;
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lantiq,phy2 = <0x0>;
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};
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asc1: serial@e100c00 {
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compatible = "lantiq,asc";
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reg = <0xe100c00 0x400>;
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interrupt-parent = <&icu0>;
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interrupts = <112 113 114>;
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};
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deu@e103100 {
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compatible = "lantiq,deu-xrx200";
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reg = <0xe103100 0xf00>;
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};
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dma0: dma@e104100 {
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compatible = "lantiq,dma-xway";
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reg = <0xe104100 0x800>;
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};
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ebu0: ebu@e105300 {
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compatible = "lantiq,ebu-xway";
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reg = <0xe105300 0x100>;
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};
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usb0: usb@e101000 {
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status = "disabled";
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compatible = "lantiq,xrx200-usb";
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reg = <0xe101000 0x1000
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0xe120000 0x3f000>;
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interrupt-parent = <&icu0>;
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interrupts = <62 91>;
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dr_mode = "host";
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phys = <&usb_phy0>;
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phy-names = "usb2-phy";
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};
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usb1: usb@e106000 {
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status = "disabled";
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compatible = "lantiq,xrx200-usb";
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reg = <0xe106000 0x1000>;
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interrupt-parent = <&icu0>;
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interrupts = <91>;
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dr_mode = "host";
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phys = <&usb_phy1>;
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phy-names = "usb2-phy";
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};
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eth0: eth@e108000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "lantiq,xrx200-net";
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reg = < 0xe108000 0x3000 /* switch */
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0xe10b100 0x70 /* mdio */
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0xe10b1d8 0x30 /* mii */
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0xe10b308 0x30 /* pmac */
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>;
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interrupt-parent = <&icu0>;
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interrupts = <75 73 72>;
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resets = <&reset0 21 16>, <&reset0 8 8>;
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reset-names = "switch", "ppe";
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lantiq,phys = <&gphy0>, <&gphy1>;
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};
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mei@e116000 {
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compatible = "lantiq,mei-xrx200";
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reg = <0xe116000 0x9c>;
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interrupt-parent = <&icu0>;
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interrupts = <63>;
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};
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ppe@e234000 {
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compatible = "lantiq,ppe-xrx200";
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interrupt-parent = <&icu0>;
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interrupts = <96>;
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};
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pcie0: pcie@d900000 {
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compatible = "lantiq,pcie-xrx200";
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#interrupt-cells = <1>;
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#size-cells = <2>;
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#address-cells = <3>;
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interrupt-parent = <&icu0>;
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interrupts = <161 144>;
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device_type = "pci";
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gpio-reset = <&gpio 38 GPIO_ACTIVE_HIGH>;
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};
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pci0: pci@e105400 {
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status = "disabled";
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#address-cells = <3>;
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#size-cells = <2>;
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#interrupt-cells = <1>;
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compatible = "lantiq,pci-xway";
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bus-range = <0x0 0x0>;
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ranges = <0x2000000 0 0x8000000 0x8000000 0 0x2000000 /* pci memory */
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0x1000000 0 0x00000000 0xae00000 0 0x200000>; /* io space */
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reg = <0x7000000 0x8000 /* config space */
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0xe105400 0x400>; /* pci bridge */
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lantiq,bus-clock = <33333333>;
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interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
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interrupt-map = <0x7000 0 0 1 &icu0 30 1>; /* slot 14, irq 30 */
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req-mask = <0x1>; /* GNT1 */
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};
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};
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vdsl {
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compatible = "lantiq,vdsl-vrx200";
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};
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};
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