openwrtv4/target/linux/oxnas/patches-3.14/320-oxnas-irqchip.patch
John Crispin e553dfc356 oxnas: re-add support for kernel 3.14
This reverts commit c81ddddde5fd193802d511b42eb7b108aac17136 on
https://gitorious.org/openwrt-oxnas/openwrt-oxnas.git
which removed patches and config for 3.14.

[arm_introduce-dma-fiq-irq-broadcast patch was renamed to match 3.18]

Signed-off-by: Daniel Golle <daniel@makrotopia.org>

SVN-Revision: 43520
2014-12-05 00:20:41 +00:00

40 lines
1.6 KiB
Diff

Index: linux-3.14.18/drivers/irqchip/Kconfig
===================================================================
--- linux-3.14.18.orig/drivers/irqchip/Kconfig
+++ linux-3.14.18/drivers/irqchip/Kconfig
@@ -10,6 +10,11 @@ config ARM_GIC
config GIC_NON_BANKED
bool
+config PLXTECH_RPS
+ def_bool y if ARHC_OXNAS
+ depends on ARCH_OXNAS
+ select IRQ_DOMAIN
+
config ARM_NVIC
bool
select IRQ_DOMAIN
Index: linux-3.14.18/drivers/irqchip/Makefile
===================================================================
--- linux-3.14.18.orig/drivers/irqchip/Makefile
+++ linux-3.14.18/drivers/irqchip/Makefile
@@ -20,6 +20,7 @@ obj-$(CONFIG_IMGPDC_IRQ) += irq-imgpdc.
obj-$(CONFIG_SIRF_IRQ) += irq-sirfsoc.o
obj-$(CONFIG_RENESAS_INTC_IRQPIN) += irq-renesas-intc-irqpin.o
obj-$(CONFIG_RENESAS_IRQC) += irq-renesas-irqc.o
+obj-$(CONFIG_PLXTECH_RPS) += irq-rps.o
obj-$(CONFIG_VERSATILE_FPGA_IRQ) += irq-versatile-fpga.o
obj-$(CONFIG_ARCH_NSPIRE) += irq-zevio.o
obj-$(CONFIG_ARCH_VT8500) += irq-vt8500.o
Index: linux-3.14.18/drivers/irqchip/irq-gic.c
===================================================================
--- linux-3.14.18.orig/drivers/irqchip/irq-gic.c
+++ linux-3.14.18/drivers/irqchip/irq-gic.c
@@ -1015,6 +1015,7 @@ IRQCHIP_DECLARE(gic_400, "arm,gic-400",
IRQCHIP_DECLARE(cortex_a15_gic, "arm,cortex-a15-gic", gic_of_init);
IRQCHIP_DECLARE(cortex_a9_gic, "arm,cortex-a9-gic", gic_of_init);
IRQCHIP_DECLARE(cortex_a7_gic, "arm,cortex-a7-gic", gic_of_init);
+IRQCHIP_DECLARE(arm11_mpcore_gic, "arm,arm11mp-gic", gic_of_init);
IRQCHIP_DECLARE(msm_8660_qgic, "qcom,msm-8660-qgic", gic_of_init);
IRQCHIP_DECLARE(msm_qgic2, "qcom,msm-qgic2", gic_of_init);