eb9ba2b91e
YunCore CPE870 is an outdoor CPE/AP based on Atheros AR9341. Short specification: - 535/400/200 MHz (CPU/DDR/AHB) - 2x 10/100 Mbps Ethernet, passive PoE support - 64/128 MB of RAM (DDR2) - 8 MB of FLASH - 2T2R 2.4 GHz with external PA (SKY65174-21), up to 30 dBm - internal 14 dBi panel antenna - 8x LED, 1x button - UART (JP1) header on PCB Flash instruction (do it under U-Boot, using UART): 1. tftp 0x80060000 lede-ar71xx-generic-cpe870-squashfs-sysupgrade.bin 2. erase 0x9f020000 +$filesize 3. cp.b $fileaddr 0x9f020000 $filesize 4. setenv bootcmd "bootm 0x9f020000" 5. saveenv && reset Vendor firmware access (login/password): Admin/5up Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
152 lines
3.8 KiB
C
152 lines
3.8 KiB
C
/*
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* YunCore CPE870 board support
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*
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* Copyright (C) 2016 Piotr Dymacz <pepe2k@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*/
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#include <linux/gpio.h>
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#include <linux/platform_device.h>
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#include <asm/mach-ath79/ath79.h>
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#include <asm/mach-ath79/ar71xx_regs.h>
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#include "common.h"
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#include "dev-eth.h"
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#include "dev-gpio-buttons.h"
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#include "dev-leds-gpio.h"
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#include "dev-m25p80.h"
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#include "dev-usb.h"
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#include "dev-wmac.h"
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#include "machtypes.h"
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#define CPE870_GPIO_LED_LINK1 0
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#define CPE870_GPIO_LED_LINK2 1
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#define CPE870_GPIO_LED_LINK3 2
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#define CPE870_GPIO_LED_LINK4 3
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#define CPE870_GPIO_LED_WLAN 13
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#define CPE870_GPIO_LED_WAN 19
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#define CPE870_GPIO_LED_LAN 20
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#define CPE870_GPIO_BTN_RESET 16
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#define CPE870_KEYS_POLL_INTERVAL 20
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#define CPE870_KEYS_DEBOUNCE_INTERVAL (3 * CPE870_KEYS_POLL_INTERVAL)
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static struct gpio_led cpe870_leds_gpio[] __initdata = {
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{
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.name = "cpe870:green:lan",
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.gpio = CPE870_GPIO_LED_LAN,
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.active_low = 1,
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},
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{
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.name = "cpe870:green:wan",
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.gpio = CPE870_GPIO_LED_WAN,
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.active_low = 1,
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},
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{
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.name = "cpe870:green:wlan",
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.gpio = CPE870_GPIO_LED_WLAN,
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.active_low = 1,
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},
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{
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.name = "cpe870:green:link1",
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.gpio = CPE870_GPIO_LED_LINK1,
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.active_low = 1,
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},
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{
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.name = "cpe870:green:link2",
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.gpio = CPE870_GPIO_LED_LINK2,
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.active_low = 1,
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},
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{
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.name = "cpe870:green:link3",
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.gpio = CPE870_GPIO_LED_LINK3,
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.active_low = 1,
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},
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{
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.name = "cpe870:green:link4",
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.gpio = CPE870_GPIO_LED_LINK4,
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.active_low = 1,
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},
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};
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static struct gpio_keys_button cpe870_gpio_keys[] __initdata = {
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{
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.desc = "reset",
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.type = EV_KEY,
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.code = KEY_RESTART,
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.debounce_interval = CPE870_KEYS_DEBOUNCE_INTERVAL,
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.gpio = CPE870_GPIO_BTN_RESET,
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.active_low = 1,
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},
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};
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static void __init cpe870_gpio_setup(void)
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{
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/* Disable JTAG (enables GPIO0-3) */
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ath79_gpio_function_enable(AR934X_GPIO_FUNC_JTAG_DISABLE);
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ath79_gpio_direction_select(CPE870_GPIO_LED_LINK1, true);
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ath79_gpio_direction_select(CPE870_GPIO_LED_LINK2, true);
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ath79_gpio_direction_select(CPE870_GPIO_LED_LINK3, true);
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ath79_gpio_direction_select(CPE870_GPIO_LED_LINK4, true);
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/* Mute LEDs on boot */
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gpio_set_value(CPE870_GPIO_LED_LAN, 1);
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gpio_set_value(CPE870_GPIO_LED_WAN, 1);
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gpio_set_value(CPE870_GPIO_LED_LINK1, 1);
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gpio_set_value(CPE870_GPIO_LED_LINK2, 1);
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gpio_set_value(CPE870_GPIO_LED_LINK3, 1);
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gpio_set_value(CPE870_GPIO_LED_LINK4, 1);
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ath79_gpio_output_select(CPE870_GPIO_LED_LINK1, 0);
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ath79_gpio_output_select(CPE870_GPIO_LED_LINK2, 0);
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ath79_gpio_output_select(CPE870_GPIO_LED_LINK3, 0);
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ath79_gpio_output_select(CPE870_GPIO_LED_LINK4, 0);
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ath79_register_leds_gpio(-1, ARRAY_SIZE(cpe870_leds_gpio),
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cpe870_leds_gpio);
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ath79_register_gpio_keys_polled(-1, CPE870_KEYS_POLL_INTERVAL,
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ARRAY_SIZE(cpe870_gpio_keys),
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cpe870_gpio_keys);
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}
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static void __init cpe870_setup(void)
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{
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u8 *art = (u8 *) KSEG1ADDR(0x1fff1000);
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u8 *mac = (u8 *) KSEG1ADDR(0x1fff0000);
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ath79_register_m25p80(NULL);
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cpe870_gpio_setup();
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ath79_register_mdio(1, 0x0);
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ath79_switch_data.phy4_mii_en = 1;
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ath79_switch_data.phy_poll_mask = BIT(4);
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/* LAN */
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ath79_eth1_data.duplex = DUPLEX_FULL;
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ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
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ath79_eth1_data.speed = SPEED_1000;
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ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1);
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ath79_register_eth(1);
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/* WAN */
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ath79_eth0_data.duplex = DUPLEX_FULL;
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ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
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ath79_eth0_data.speed = SPEED_100;
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ath79_eth0_data.phy_mask = BIT(4);
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ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev;
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ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
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ath79_register_eth(0);
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ath79_register_wmac(art, NULL);
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}
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MIPS_MACHINE(ATH79_MACH_CPE870, "CPE870", "YunCore CPE870", cpe870_setup);
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