187 lines
5.9 KiB
Diff
187 lines
5.9 KiB
Diff
From 3c6560eccfeee3a93d57c3b2206abfbe06459015 Mon Sep 17 00:00:00 2001
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From: Chen-Yu Tsai <wens@csie.org>
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Date: Sat, 7 Dec 2013 01:29:37 +0800
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Subject: [PATCH] net: stmmac: sunxi platfrom extensions for GMAC in Allwinner
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A20 SoC's
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The Allwinner A20 has an ethernet controller that seems to be
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an early version of Synopsys DesignWare MAC 10/100/1000 Universal,
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which is supported by the stmmac driver.
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Allwinner's GMAC requires setting additional registers in the SoC's
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clock control unit.
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The exact version of the DWMAC IP that Allwinner uses is unknown,
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thus the exact feature set is unknown.
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Signed-off-by: Chen-Yu Tsai <wens@csie.org>
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---
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.../bindings/net/allwinner,sun7i-gmac.txt | 22 +++++++
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drivers/net/ethernet/stmicro/stmmac/Kconfig | 12 ++++
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drivers/net/ethernet/stmicro/stmmac/Makefile | 1 +
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drivers/net/ethernet/stmicro/stmmac/dwmac-sunxi.c | 76 ++++++++++++++++++++++
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drivers/net/ethernet/stmicro/stmmac/stmmac.h | 3 +
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.../net/ethernet/stmicro/stmmac/stmmac_platform.c | 3 +
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6 files changed, 117 insertions(+)
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create mode 100644 Documentation/devicetree/bindings/net/allwinner,sun7i-gmac.txt
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create mode 100644 drivers/net/ethernet/stmicro/stmmac/dwmac-sunxi.c
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--- /dev/null
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+++ b/Documentation/devicetree/bindings/net/allwinner,sun7i-gmac.txt
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@@ -0,0 +1,22 @@
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+* Allwinner GMAC ethernet controller
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+
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+This device is a platform glue layer for stmmac.
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+Please see stmmac.txt for the other unchanged properties.
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+
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+Required properties:
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+ - compatible: Should be "allwinner,sun7i-gmac"
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+ - reg: Address and length of register set for the device and corresponding
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+ clock control
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+
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+Examples:
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+
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+ gmac: ethernet@01c50000 {
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+ compatible = "allwinner,sun7i-gmac";
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+ reg = <0x01c50000 0x10000>,
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+ <0x01c20164 0x4>;
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+ interrupts = <0 85 1>;
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+ interrupt-names = "macirq";
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+ clocks = <&ahb_gates 49>;
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+ clock-names = "stmmaceth";
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+ phy-mode = "mii";
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+ };
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--- a/drivers/net/ethernet/stmicro/stmmac/Kconfig
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+++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig
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@@ -25,6 +25,18 @@ config STMMAC_PLATFORM
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If unsure, say N.
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+config DWMAC_SUNXI
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+ bool "Allwinner GMAC support"
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+ depends on STMMAC_PLATFORM
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+ depends on ARCH_SUNXI
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+ default y
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+ ---help---
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+ Support for Allwinner A20 GMAC ethernet driver.
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+
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+ This selects Allwinner SoC glue layer support for the
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+ stmmac device driver. This driver is used for A20 GMAC
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+ ethernet controller.
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+
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config STMMAC_PCI
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bool "STMMAC PCI bus support"
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depends on STMMAC_ETH && PCI
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--- a/drivers/net/ethernet/stmicro/stmmac/Makefile
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+++ b/drivers/net/ethernet/stmicro/stmmac/Makefile
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@@ -1,6 +1,7 @@
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obj-$(CONFIG_STMMAC_ETH) += stmmac.o
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stmmac-$(CONFIG_STMMAC_PLATFORM) += stmmac_platform.o
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stmmac-$(CONFIG_STMMAC_PCI) += stmmac_pci.o
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+stmmac-$(CONFIG_DWMAC_SUNXI) += dwmac-sunxi.o
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stmmac-objs:= stmmac_main.o stmmac_ethtool.o stmmac_mdio.o ring_mode.o \
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chain_mode.o dwmac_lib.o dwmac1000_core.o dwmac1000_dma.o \
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dwmac100_core.o dwmac100_dma.o enh_desc.o norm_desc.o \
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--- /dev/null
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+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sunxi.c
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@@ -0,0 +1,76 @@
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+/**
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+ * dwmac-sunxi.c - Allwinner sunxi DWMAC specific glue layer
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+ *
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+ * Copyright (C) 2013 Chen-Yu Tsai
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+ *
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+ * Chen-Yu Tsai <wens@csie.org>
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+ *
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+ * This program is free software; you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License as published by
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+ * the Free Software Foundation; either version 2 of the License, or
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+ * (at your option) any later version.
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+ *
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+ * This program is distributed in the hope that it will be useful,
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+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+ * GNU General Public License for more details.
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+ */
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+
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+#include <linux/clk.h>
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+#include <linux/phy.h>
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+#include <linux/stmmac.h>
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+
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+#define GMAC_IF_TYPE_RGMII 0x4
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+
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+#define GMAC_TX_CLK_MASK 0x3
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+#define GMAC_TX_CLK_MII 0x0
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+#define GMAC_TX_CLK_RGMII_INT 0x2
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+
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+static int sun7i_gmac_init(struct platform_device *pdev)
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+{
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+ struct resource *res;
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+ struct device *dev = &pdev->dev;
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+ void __iomem *addr = NULL;
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+ struct plat_stmmacenet_data *plat_dat = NULL;
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+ u32 priv_clk_reg;
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+
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+ plat_dat = dev_get_platdata(&pdev->dev);
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+ if (!plat_dat)
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+ return -EINVAL;
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+
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+ /* Get GMAC clock register in CCU */
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+ res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
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+ addr = devm_ioremap_resource(dev, res);
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+ if (IS_ERR(addr))
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+ return PTR_ERR(addr);
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+
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+ priv_clk_reg = readl(addr);
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+
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+ /* Set GMAC interface port mode */
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+ if (plat_dat->interface == PHY_INTERFACE_MODE_RGMII)
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+ priv_clk_reg |= GMAC_IF_TYPE_RGMII;
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+ else
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+ priv_clk_reg &= ~GMAC_IF_TYPE_RGMII;
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+
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+ /* Set GMAC transmit clock source. */
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+ priv_clk_reg &= ~GMAC_TX_CLK_MASK;
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+ if (plat_dat->interface == PHY_INTERFACE_MODE_RGMII
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+ || plat_dat->interface == PHY_INTERFACE_MODE_GMII)
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+ priv_clk_reg |= GMAC_TX_CLK_RGMII_INT;
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+ else
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+ priv_clk_reg |= GMAC_TX_CLK_MII;
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+
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+ writel(priv_clk_reg, addr);
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+
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+ /* mask out phy addr 0x0 */
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+ plat_dat->mdio_bus_data->phy_mask = 0x1;
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+
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+ return 0;
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+}
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+
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+const struct plat_stmmacenet_data sun7i_gmac_data = {
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+ .has_gmac = 1,
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+ .tx_coe = 1,
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+ .init = sun7i_gmac_init,
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+};
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+
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--- a/drivers/net/ethernet/stmicro/stmmac/stmmac.h
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+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac.h
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@@ -130,6 +130,9 @@ void stmmac_disable_eee_mode(struct stmm
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bool stmmac_eee_init(struct stmmac_priv *priv);
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#ifdef CONFIG_STMMAC_PLATFORM
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+#ifdef CONFIG_DWMAC_SUNXI
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+extern const struct plat_stmmacenet_data sun7i_gmac_data;
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+#endif
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extern struct platform_driver stmmac_pltfr_driver;
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static inline int stmmac_register_platform(void)
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{
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--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
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+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
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@@ -35,6 +35,9 @@ static const struct of_device_id stmmac_
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{ .compatible = "snps,dwmac-3.70a"},
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{ .compatible = "snps,dwmac-3.710"},
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{ .compatible = "snps,dwmac"},
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+#ifdef CONFIG_DWMAC_SUNXI
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+ { .compatible = "allwinner,sun7i-gmac", .data = &sun7i_gmac_data},
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+#endif
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{ /* sentinel */ }
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};
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MODULE_DEVICE_TABLE(of, stmmac_dt_ids);
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