openwrtv4/target/linux/brcm2708/patches-3.10/0080-Fix-function-tracing.patch
Florian Fainelli 6918ea2484 brcm2708: update 3.10 patches with raspberrypi/rpi-3.10.y of 27 Apr. 2014
Update the 3.10 rasperry patches by rebasing raspberry/rpi-3.10-y
against linux-stable/v3.10.49.

Signed-off-by: Florian Fainelli <florian@openwrt.org>

SVN-Revision: 42678
2014-09-27 19:10:51 +00:00

67 lines
2.2 KiB
Diff

From cf9f56af2d067396b32e65cf10b9d2b072d08033 Mon Sep 17 00:00:00 2001
From: Gordon Hollingworth <gordon@holliweb.co.uk>
Date: Mon, 8 Jul 2013 04:12:19 +0100
Subject: [PATCH 080/196] Fix function tracing
---
drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c b/drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c
index d655363..765451b 100644
--- a/drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c
+++ b/drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c
@@ -77,7 +77,7 @@ int queued_port[MAX_EPS_CHANNELS];
#ifdef FIQ_DEBUG
char buffer[1000*16];
int wptr;
-void _fiq_print(FIQDBG_T dbg_lvl, char *fmt, ...)
+void notrace _fiq_print(FIQDBG_T dbg_lvl, char *fmt, ...)
{
FIQDBG_T dbg_lvl_req = FIQDBG_PORTHUB;
va_list args;
@@ -101,7 +101,7 @@ void _fiq_print(FIQDBG_T dbg_lvl, char *fmt, ...)
}
#endif
-void fiq_queue_request(int channel, int odd_frame)
+void notrace fiq_queue_request(int channel, int odd_frame)
{
hcchar_data_t hcchar = { .d32 = FIQ_READ(dwc_regs_base + 0x500 + (channel * 0x20) + 0x0) };
hcsplt_data_t hcsplt = { .d32 = FIQ_READ(dwc_regs_base + 0x500 + (channel * 0x20) + 0x4) };
@@ -147,7 +147,7 @@ static int last_sof = -1;
*/
int diff;
-int fiq_sof_handle(hfnum_data_t hfnum)
+int notrace fiq_sof_handle(hfnum_data_t hfnum)
{
int handled = 0;
int i;
@@ -206,12 +206,12 @@ int fiq_sof_handle(hfnum_data_t hfnum)
return handled;
}
-int port_id(hcsplt_data_t hcsplt)
+int notrace port_id(hcsplt_data_t hcsplt)
{
return hcsplt.b.prtaddr + (hcsplt.b.hubaddr << 8);
}
-int fiq_hcintr_handle(int channel, hfnum_data_t hfnum)
+int notrace fiq_hcintr_handle(int channel, hfnum_data_t hfnum)
{
hcchar_data_t hcchar = { .d32 = FIQ_READ(dwc_regs_base + 0x500 + (channel * 0x20) + 0x0) };
hcsplt_data_t hcsplt = { .d32 = FIQ_READ(dwc_regs_base + 0x500 + (channel * 0x20) + 0x4) };
@@ -361,7 +361,7 @@ gintmsk_data_t gintmsk;
gintsts_data_t triggered, handled, keep;
hfnum_data_t hfnum;
-void __attribute__ ((naked)) dwc_otg_hcd_handle_fiq(void)
+void __attribute__ ((naked)) notrace dwc_otg_hcd_handle_fiq(void)
{
/* entry takes care to store registers we will be treading on here */
--
1.9.1