f5f173e2b7
* fixes NAND * adds latest ethernet patches Signed-off-by: John Crispin <john@phrozen.org>
36 lines
1.3 KiB
Diff
36 lines
1.3 KiB
Diff
From 25eaa5d6483a5899e6bf48b47f762f05c186b4b6 Mon Sep 17 00:00:00 2001
|
|
From: John Crispin <john@phrozen.org>
|
|
Date: Fri, 22 Apr 2016 11:08:43 +0200
|
|
Subject: [PATCH 080/102] net-next: mediatek: properly handle RGMII modes
|
|
|
|
If an external Gigabit PHY is connected to either of the MACs we need to
|
|
be able to tell the PHY to use a delay. Not doing so will result in heavy
|
|
packet loss and/or data corruption when using PHYs such as the IC+ IP1001.
|
|
We tell the PHY which MII delay mode to use via the devictree.
|
|
|
|
The ethernet driver needs to be adapted to handle all 3 rgmii-*id modes
|
|
in the same way as normal rgmii when setting up the MAC.
|
|
|
|
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
|
|
Signed-off-by: John Crispin <john@phrozen.org>
|
|
---
|
|
drivers/net/ethernet/mediatek/mtk_eth_soc.c | 3 +++
|
|
1 file changed, 3 insertions(+)
|
|
|
|
diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
|
|
index ab61789..76ecb1b 100644
|
|
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
|
|
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
|
|
@@ -236,6 +236,9 @@ static int mtk_phy_connect(struct mtk_mac *mac)
|
|
return -ENODEV;
|
|
|
|
switch (of_get_phy_mode(np)) {
|
|
+ case PHY_INTERFACE_MODE_RGMII_TXID:
|
|
+ case PHY_INTERFACE_MODE_RGMII_RXID:
|
|
+ case PHY_INTERFACE_MODE_RGMII_ID:
|
|
case PHY_INTERFACE_MODE_RGMII:
|
|
ge_mode = 0;
|
|
break;
|
|
--
|
|
1.7.10.4
|
|
|