07532dca7f
Also refresh the related generic/platform patches. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> SVN-Revision: 36039
117 lines
3.4 KiB
Diff
117 lines
3.4 KiB
Diff
From cc77f36d2ea812027dc2a8a94c788c4c145f82dc Mon Sep 17 00:00:00 2001
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From: John Crispin <blogic@openwrt.org>
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Date: Mon, 22 Oct 2012 10:25:39 +0200
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Subject: [PATCH 33/40] MTD: lantiq: xway: make nand actually work
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http://lists.infradead.org/pipermail/linux-mtd/2012-September/044240.html
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Signed-off-by: John Crispin <blogic@openwrt.org>
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---
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drivers/mtd/nand/xway_nand.c | 54 +++++++++++++++++++++++++++++++++++-------
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1 file changed, 45 insertions(+), 9 deletions(-)
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--- a/drivers/mtd/nand/xway_nand.c
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+++ b/drivers/mtd/nand/xway_nand.c
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@@ -54,19 +54,29 @@
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#define NAND_CON_CSMUX (1 << 1)
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#define NAND_CON_NANDM 1
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+static u32 xway_latchcmd;
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+
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static void xway_reset_chip(struct nand_chip *chip)
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{
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unsigned long nandaddr = (unsigned long) chip->IO_ADDR_W;
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unsigned long flags;
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+ unsigned long timeout;
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nandaddr &= ~NAND_WRITE_ADDR;
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nandaddr |= NAND_WRITE_CMD;
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/* finish with a reset */
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+ timeout = jiffies + msecs_to_jiffies(200);
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+
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spin_lock_irqsave(&ebu_lock, flags);
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+
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writeb(NAND_WRITE_CMD_RESET, (void __iomem *) nandaddr);
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- while ((ltq_ebu_r32(EBU_NAND_WAIT) & NAND_WAIT_WR_C) == 0)
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- ;
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+ do {
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+ if ((ltq_ebu_r32(EBU_NAND_WAIT) & NAND_WAIT_WR_C) == 0)
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+ break;
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+ cond_resched();
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+ } while (!time_after_eq(jiffies, timeout));
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+
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spin_unlock_irqrestore(&ebu_lock, flags);
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}
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@@ -94,17 +104,15 @@ static void xway_cmd_ctrl(struct mtd_inf
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unsigned long flags;
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if (ctrl & NAND_CTRL_CHANGE) {
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- nandaddr &= ~(NAND_WRITE_CMD | NAND_WRITE_ADDR);
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if (ctrl & NAND_CLE)
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- nandaddr |= NAND_WRITE_CMD;
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- else
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- nandaddr |= NAND_WRITE_ADDR;
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- this->IO_ADDR_W = (void __iomem *) nandaddr;
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+ xway_latchcmd = NAND_WRITE_CMD;
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+ else if (ctrl & NAND_ALE)
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+ xway_latchcmd = NAND_WRITE_ADDR;
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}
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if (cmd != NAND_CMD_NONE) {
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spin_lock_irqsave(&ebu_lock, flags);
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- writeb(cmd, this->IO_ADDR_W);
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+ writeb(cmd, (void __iomem *) (nandaddr | xway_latchcmd));
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while ((ltq_ebu_r32(EBU_NAND_WAIT) & NAND_WAIT_WR_C) == 0)
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;
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spin_unlock_irqrestore(&ebu_lock, flags);
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@@ -124,12 +132,38 @@ static unsigned char xway_read_byte(stru
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int ret;
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spin_lock_irqsave(&ebu_lock, flags);
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- ret = ltq_r8((void __iomem *)(nandaddr + NAND_READ_DATA));
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+ ret = ltq_r8((void __iomem *)(nandaddr | NAND_READ_DATA));
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spin_unlock_irqrestore(&ebu_lock, flags);
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return ret;
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}
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+static void xway_read_buf(struct mtd_info *mtd, u_char *buf, int len)
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+{
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+ struct nand_chip *this = mtd->priv;
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+ unsigned long nandaddr = (unsigned long) this->IO_ADDR_R;
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+ unsigned long flags;
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+ int i;
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+
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+ spin_lock_irqsave(&ebu_lock, flags);
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+ for (i = 0; i < len; i++)
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+ buf[i] = ltq_r8((void __iomem *)(nandaddr | NAND_READ_DATA));
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+ spin_unlock_irqrestore(&ebu_lock, flags);
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+}
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+
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+static void xway_write_buf(struct mtd_info *mtd, const u_char *buf, int len)
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+{
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+ struct nand_chip *this = mtd->priv;
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+ unsigned long nandaddr = (unsigned long) this->IO_ADDR_W;
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+ unsigned long flags;
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+ int i;
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+
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+ spin_lock_irqsave(&ebu_lock, flags);
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+ for (i = 0; i < len; i++)
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+ ltq_w8(buf[i], (void __iomem *)nandaddr);
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+ spin_unlock_irqrestore(&ebu_lock, flags);
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+}
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+
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static int xway_nand_probe(struct platform_device *pdev)
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{
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struct nand_chip *this = platform_get_drvdata(pdev);
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@@ -175,6 +209,8 @@ static struct platform_nand_data xway_na
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.dev_ready = xway_dev_ready,
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.select_chip = xway_select_chip,
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.read_byte = xway_read_byte,
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+ .read_buf = xway_read_buf,
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+ .write_buf = xway_write_buf,
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}
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};
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