0755c2d117
Add and enable pincontrol drivers, and update dts(i) files with appropriate hogs. Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
226 lines
6.1 KiB
Diff
226 lines
6.1 KiB
Diff
From ab2f33e35e35905a76204138143875251f3e1088 Mon Sep 17 00:00:00 2001
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From: Jonas Gorski <jonas.gorski@gmail.com>
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Date: Fri, 24 Jun 2016 22:07:42 +0200
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Subject: [PATCH 01/13] pinctrl: add bcm63xx base code
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Setup directory and add a helper for bcm63xx pinctrl support.
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Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
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---
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drivers/pinctrl/Kconfig | 1 +
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drivers/pinctrl/Makefile | 1 +
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drivers/pinctrl/bcm63xx/Kconfig | 3 +
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drivers/pinctrl/bcm63xx/Makefile | 1 +
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drivers/pinctrl/bcm63xx/pinctrl-bcm63xx.c | 142 ++++++++++++++++++++++++++++++
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drivers/pinctrl/bcm63xx/pinctrl-bcm63xx.h | 14 +++
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7 files changed, 163 insertions(+)
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create mode 100644 drivers/pinctrl/bcm63xx/Kconfig
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create mode 100644 drivers/pinctrl/bcm63xx/Makefile
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create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm63xx.c
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create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm63xx.h
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--- a/drivers/pinctrl/Kconfig
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+++ b/drivers/pinctrl/Kconfig
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@@ -247,6 +247,7 @@ config PINCTRL_ZYNQ
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This selectes the pinctrl driver for Xilinx Zynq.
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source "drivers/pinctrl/bcm/Kconfig"
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+source "drivers/pinctrl/bcm63xx/Kconfig"
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source "drivers/pinctrl/berlin/Kconfig"
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source "drivers/pinctrl/freescale/Kconfig"
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source "drivers/pinctrl/intel/Kconfig"
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--- a/drivers/pinctrl/Makefile
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+++ b/drivers/pinctrl/Makefile
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@@ -41,6 +41,7 @@ obj-$(CONFIG_PINCTRL_ST) += pinctrl-st.
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obj-$(CONFIG_PINCTRL_ZYNQ) += pinctrl-zynq.o
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obj-$(CONFIG_ARCH_BCM) += bcm/
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+obj-y += bcm63xx/
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obj-$(CONFIG_ARCH_BERLIN) += berlin/
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obj-y += freescale/
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obj-$(CONFIG_X86) += intel/
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--- /dev/null
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+++ b/drivers/pinctrl/bcm63xx/Kconfig
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@@ -0,0 +1,3 @@
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+config PINCTRL_BCM63XX
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+ bool
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+ select GPIO_GENERIC
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--- /dev/null
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+++ b/drivers/pinctrl/bcm63xx/Makefile
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@@ -0,0 +1 @@
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+obj-$(CONFIG_PINCTRL_BCM63XX) += pinctrl-bcm63xx.o
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--- /dev/null
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+++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm63xx.c
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@@ -0,0 +1,155 @@
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+/*
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+ * This file is subject to the terms and conditions of the GNU General Public
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+ * License. See the file "COPYING" in the main directory of this archive
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+ * for more details.
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+ *
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+ * Copyright (C) 2016 Jonas Gorski <jonas.gorski@gmail.com>
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+ */
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+
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+#include <linux/bitops.h>
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+#include <linux/device.h>
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+#include <linux/gpio/driver.h>
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+#include <linux/of_irq.h>
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+
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+#include "pinctrl-bcm63xx.h"
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+#include "../core.h"
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+
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+#define BANK_SIZE sizeof(u32)
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+#define PINS_PER_BANK (BANK_SIZE * BITS_PER_BYTE)
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+
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+#ifdef CONFIG_OF
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+static int bcm63xx_gpio_of_xlate(struct gpio_chip *gc,
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+ const struct of_phandle_args *gpiospec,
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+ u32 *flags)
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+{
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+ struct gpio_chip *base = gpiochip_get_data(gc);
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+ int pin = gpiospec->args[0];
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+
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+ if (gc != &base[pin / PINS_PER_BANK])
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+ return -EINVAL;
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+
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+ pin = pin % PINS_PER_BANK;
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+
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+ if (pin >= gc->ngpio)
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+ return -EINVAL;
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+
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+ if (flags)
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+ *flags = gpiospec->args[1];
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+
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+ return pin;
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+}
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+#endif
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+
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+static int bcm63xx_gpio_to_irq(struct gpio_chip *chip, unsigned gpio)
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+{
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+ struct gpio_chip *base = gpiochip_get_data(chip);
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+ char irq_name[7]; /* "gpioXX" */
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+
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+ /* FIXME: this is ugly */
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+ sprintf(irq_name, "gpio%d", gpio + PINS_PER_BANK * (chip - base));
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+ return of_irq_get_byname(chip->of_node, irq_name);
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+}
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+
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+static int bcm63xx_setup_gpio(struct device *dev, struct gpio_chip *gc,
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+ void __iomem *dirout, void __iomem *data,
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+ size_t sz, int ngpio)
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+
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+{
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+ int banks, chips, i, ret = -EINVAL;
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+
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+ chips = DIV_ROUND_UP(ngpio, PINS_PER_BANK);
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+ banks = sz / BANK_SIZE;
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+
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+ for (i = 0; i < chips; i++) {
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+ int offset, pins;
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+ int reg_offset;
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+ char *label;
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+
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+ label = devm_kasprintf(dev, GFP_KERNEL, "bcm63xx-gpio.%i", i);
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+ if (!label)
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+ return -ENOMEM;
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+
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+ offset = i * PINS_PER_BANK;
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+ pins = min_t(int, ngpio - offset, PINS_PER_BANK);
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+
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+ /* the registers are treated like a huge big endian register */
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+ reg_offset = (banks - i - 1) * BANK_SIZE;
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+
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+ ret = bgpio_init(&gc[i], dev, BANK_SIZE, data + reg_offset,
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+ NULL, NULL, dirout + reg_offset, NULL,
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+ BGPIOF_BIG_ENDIAN_BYTE_ORDER);
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+ if (ret)
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+ return ret;
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+
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+ gc[i].request = gpiochip_generic_request;
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+ gc[i].free = gpiochip_generic_free;
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+
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+ if (of_get_property(dev->of_node, "interrupt-names", NULL))
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+ gc[i].to_irq = bcm63xx_gpio_to_irq;
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+
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+#ifdef CONFIG_OF
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+ gc[i].of_gpio_n_cells = 2;
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+ gc[i].of_xlate = bcm63xx_gpio_of_xlate;
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+#endif
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+
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+ gc[i].label = label;
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+ gc[i].ngpio = pins;
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+
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+ devm_gpiochip_add_data(dev, &gc[i], gc);
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+ }
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+
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+ return 0;
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+}
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+
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+static void bcm63xx_setup_pinranges(struct gpio_chip *gc, const char *name,
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+ int ngpio)
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+{
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+ int i, chips = DIV_ROUND_UP(ngpio, PINS_PER_BANK);
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+
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+ for (i = 0; i < chips; i++) {
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+ int offset, pins;
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+
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+ offset = i * PINS_PER_BANK;
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+ pins = min_t(int, ngpio - offset, PINS_PER_BANK);
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+
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+ gpiochip_add_pin_range(&gc[i], name, 0, offset, pins);
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+ }
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+}
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+
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+struct pinctrl_dev *bcm63xx_pinctrl_register(struct platform_device *pdev,
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+ struct pinctrl_desc *desc,
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+ void *priv, struct gpio_chip *gc,
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+ int ngpio)
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+{
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+ struct pinctrl_dev *pctldev;
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+ struct resource *res;
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+ void __iomem *dirout, *data;
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+ size_t sz;
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+ int ret;
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+
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+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dirout");
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+ dirout = devm_ioremap_resource(&pdev->dev, res);
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+ if (IS_ERR(dirout))
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+ return ERR_CAST(dirout);
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+
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+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dat");
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+ data = devm_ioremap_resource(&pdev->dev, res);
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+ if (IS_ERR(data))
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+ return ERR_CAST(data);
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+
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+ sz = resource_size(res);
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+
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+ ret = bcm63xx_setup_gpio(&pdev->dev, gc, dirout, data, sz, ngpio);
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+ if (ret)
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+ return ERR_PTR(ret);
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+
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+ pctldev = devm_pinctrl_register(&pdev->dev, desc, priv);
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+ if (IS_ERR(pctldev))
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+ return pctldev;
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+
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+ bcm63xx_setup_pinranges(gc, pinctrl_dev_get_devname(pctldev), ngpio);
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+
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+ dev_info(&pdev->dev, "registered at mmio %p\n", dirout);
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+
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+ return pctldev;
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+}
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--- /dev/null
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+++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm63xx.h
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@@ -0,0 +1,14 @@
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+#ifndef __PINCTRL_BCM63XX
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+#define __PINCTRL_BCM63XX
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+
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+#include <linux/kernel.h>
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+#include <linux/gpio.h>
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+#include <linux/pinctrl/pinctrl.h>
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+#include <linux/platform_device.h>
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+
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+struct pinctrl_dev *bcm63xx_pinctrl_register(struct platform_device *pdev,
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+ struct pinctrl_desc *desc,
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+ void *priv, struct gpio_chip *gc,
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+ int ngpio);
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+
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+#endif
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