c9ae111a20
This is a backport of the patches accepted to the Linux mainline related to mvebu SoC (Armada XP and Armada 370) between Linux v3.12, and Linux v3.13. This work mainly covers: * Finishes work for sharing the pxa nand driver(drivers/mtd/nand/pxa3xx_nand.c) between the PXA family, and the Armada family. * timer initialization update, and access function for the Armada family. * Generic IRQ handling backporting. * Some bug fixes. Signed-off-by: Seif Mazareeb <seif.mazareeb@gmail.com> CC: Luka Perkov <luka@openwrt.org> SVN-Revision: 39566
70 lines
2.1 KiB
Diff
70 lines
2.1 KiB
Diff
From 09a84f8e89c3715160423701b0606ef99e2a05bf Mon Sep 17 00:00:00 2001
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From: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
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Date: Thu, 14 Nov 2013 18:25:31 -0300
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Subject: [PATCH 145/203] mtd: nand: pxa3xx: Add helper function to set page
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address
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Let's simplify the code by first introducing a helper function
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to set the page address, as done by the READ0, READOOB and SEQIN
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commands.
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Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
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Tested-by: Daniel Mack <zonque@gmail.com>
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Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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---
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drivers/mtd/nand/pxa3xx_nand.c | 36 +++++++++++++++++++++---------------
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1 file changed, 21 insertions(+), 15 deletions(-)
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--- a/drivers/mtd/nand/pxa3xx_nand.c
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+++ b/drivers/mtd/nand/pxa3xx_nand.c
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@@ -587,6 +587,26 @@ static inline int is_buf_blank(uint8_t *
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return 1;
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}
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+static void set_command_address(struct pxa3xx_nand_info *info,
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+ unsigned int page_size, uint16_t column, int page_addr)
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+{
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+ /* small page addr setting */
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+ if (page_size < PAGE_CHUNK_SIZE) {
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+ info->ndcb1 = ((page_addr & 0xFFFFFF) << 8)
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+ | (column & 0xFF);
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+
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+ info->ndcb2 = 0;
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+ } else {
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+ info->ndcb1 = ((page_addr & 0xFFFF) << 16)
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+ | (column & 0xFFFF);
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+
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+ if (page_addr & 0xFF0000)
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+ info->ndcb2 = (page_addr & 0xFF0000) >> 16;
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+ else
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+ info->ndcb2 = 0;
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+ }
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+}
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+
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static int prepare_command_pool(struct pxa3xx_nand_info *info, int command,
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uint16_t column, int page_addr)
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{
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@@ -650,22 +670,8 @@ static int prepare_command_pool(struct p
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info->ndcb0 |= NDCB0_DBC | (NAND_CMD_READSTART << 8);
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case NAND_CMD_SEQIN:
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- /* small page addr setting */
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- if (unlikely(mtd->writesize < PAGE_CHUNK_SIZE)) {
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- info->ndcb1 = ((page_addr & 0xFFFFFF) << 8)
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- | (column & 0xFF);
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-
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- info->ndcb2 = 0;
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- } else {
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- info->ndcb1 = ((page_addr & 0xFFFF) << 16)
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- | (column & 0xFFFF);
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-
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- if (page_addr & 0xFF0000)
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- info->ndcb2 = (page_addr & 0xFF0000) >> 16;
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- else
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- info->ndcb2 = 0;
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- }
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+ set_command_address(info, mtd->writesize, column, page_addr);
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info->buf_count = mtd->writesize + mtd->oobsize;
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memset(info->data_buff, 0xFF, info->buf_count);
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